| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| issue123.s | 11 R6.H = R4.H * R0.L (M), R6.L = R4.L * R0.H (ISS2);
13 _DBG R6;
15 DBGA ( R6.L , 0x8000 );
16 DBGA ( R6.H , 0x8000 );
|
| 11080.s | 24 R6=SEQSTAT;
25 R6 = R6 << 26;
26 R6 = R6 >> 26;
29 CC = R6 == R7;
|
| s4.s | 33 R6 = R0 << 31;
34 DBGA ( R6.L , 0x0000 );
35 DBGA ( R6.H , 0x8000 );
45 R6 = R0 << 1;
46 DBGA ( R6.L , 0x0002 );
47 DBGA ( R6.H , 0x0000 );
59 R6 = R0 >>> 1;
60 DBGA ( R6.L , 0x0000 );
61 DBGA ( R6.H , 0xc000 );
71 R6 = R0 >>> 31
[all...] |
| issue140.S | 10 R6.L = -32768;
11 R6.H = -32768;
15 R4 = R6.L * R1.H;
|
| cc5.S | 23 R6 = ( A0 += A1 );
24 CHECKREG R6, 0x22222222;
25 R6 = A0.w;
26 CHECKREG R6, 0x22222222;
29 R6 = A1.w;
30 CHECKREG R6, 0x11111111;
40 R6 = ( A0 += A1 );
41 CHECKREG R6, 0x7fffffff;
42 R6 = A0.w;
43 CHECKREG R6, 0xfffffffe
[all...] |
| s5.s | 17 R6 = ROT R0 BY R1.L;
18 DBGA ( R6.L , 0x0002 );
19 DBGA ( R6.H , 0x0000 );
30 R6 = ROT R0 BY R1.L;
31 DBGA ( R6.L , 0x0000 );
32 DBGA ( R6.H , 0x4000 );
42 R6 = ROT R0 BY R1.L;
43 DBGA ( R6.L , 0x0000 );
44 DBGA ( R6.H , 0xa000 );
54 R6 = ROT R0 BY R1.L
[all...] |
| m15.s | 26 R7 = A1, R6 = A0 (S2RND);
29 DBGA ( R6.L , 0xffe0 );
30 DBGA ( R6.H , 0x1fff );
37 R7 = A1, R6 = A0 (S2RND);
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0 (S2RND);
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6 = A0 (ISS2)
[all...] |
| hwloop-lt-bits.s | 9 imm32 R6, 0xaaaa5555
10 R4 = R6;
13 LT0 = R6;
14 LT1 = R6;
|
| m3.s | 35 R6 = A1.w;
37 DBGA ( R6.L , 0x8000 );
38 DBGA ( R6.H , 0x3fff );
40 R6 = A0.w;
42 DBGA ( R6.L , 0x8000 );
43 DBGA ( R6.H , 0x3fff );
49 R6 = A1.w;
51 DBGA ( R6.L , 0x0000 );
52 DBGA ( R6.H , 0x4000 );
54 R6 = A0.w
[all...] |
| m13.s | 26 R7 = A1, R6 = A0;
29 DBGA ( R6.L , 0xfff0 );
30 DBGA ( R6.H , 0x7fff );
37 R7 = A1, R6 = A0;
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0;
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6 = A0 (IS)
[all...] |
| s14.s | 20 R6 = ASHIFT R0 BY R3.L;
21 DBGA ( R6.L , 0x0000 );
22 DBGA ( R6.H , 0x8000 );
36 R6 = ASHIFT R0 BY R3.L;
37 DBGA ( R6.L , 0xffff );
38 DBGA ( R6.H , 0xffff );
52 R6 = ASHIFT R0 BY R3.L;
53 DBGA ( R6.L , 0xFF80 );
54 DBGA ( R6.H , 0xFFFF );
68 R6 = ASHIFT R0 BY R3.L
[all...] |
| disalnexcpt_implicit.S | 36 imm32 R6, 0x9abcdef0;
39 [SP - 4] = R6;
44 R6 = BYTEPACK (R0, R1) || R5 = [I##n ++ M##n]; EXP (R5, n); \
45 R5 = BYTEPACK (R0, R1) || R6 = [I##n++]; EXP (R6, n); \
54 (R6, R7) = BYTEUNPACK R3:2 || R5 = [I##n ++ M##n]; EXP (R5, n); \
55 (R5, R4) = BYTEUNPACK R1:0 || R6 = [I##n++]; EXP (R6, n); \
56 (R4, R6) = BYTEUNPACK R3:2 || R7 = [I##n--]; EXP (R7, n);
65 SAA (R1:0, R3:2) || R6 = [I##n++]; EXP (R6, n);
[all...] |
| m14.s | 26 R7 = A1, R6 = A0 (FU);
29 DBGA ( R6.L , 0xfff0 );
30 DBGA ( R6.H , 0xffff );
39 R7 = A1, R6 = A0 (FU);
42 DBGA ( R6.L , 0xffff );
43 DBGA ( R6.H , 0xffff );
52 R7 = A1, R6 = A0 (FU);
55 DBGA ( R6.L , 0xffff );
56 DBGA ( R6.H , 0xffff );
63 R7 = A1, R6 = A0 (FU)
[all...] |
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| issue123.s | 11 R6.H = R4.H * R0.L (M), R6.L = R4.L * R0.H (ISS2);
13 _DBG R6;
15 DBGA ( R6.L , 0x8000 );
16 DBGA ( R6.H , 0x8000 );
|
| 11080.s | 24 R6=SEQSTAT;
25 R6 = R6 << 26;
26 R6 = R6 >> 26;
29 CC = R6 == R7;
|
| s4.s | 33 R6 = R0 << 31;
34 DBGA ( R6.L , 0x0000 );
35 DBGA ( R6.H , 0x8000 );
45 R6 = R0 << 1;
46 DBGA ( R6.L , 0x0002 );
47 DBGA ( R6.H , 0x0000 );
59 R6 = R0 >>> 1;
60 DBGA ( R6.L , 0x0000 );
61 DBGA ( R6.H , 0xc000 );
71 R6 = R0 >>> 31
[all...] |
| issue140.S | 10 R6.L = -32768;
11 R6.H = -32768;
15 R4 = R6.L * R1.H;
|
| cc5.S | 23 R6 = ( A0 += A1 );
24 CHECKREG R6, 0x22222222;
25 R6 = A0.w;
26 CHECKREG R6, 0x22222222;
29 R6 = A1.w;
30 CHECKREG R6, 0x11111111;
40 R6 = ( A0 += A1 );
41 CHECKREG R6, 0x7fffffff;
42 R6 = A0.w;
43 CHECKREG R6, 0xfffffffe
[all...] |
| s5.s | 17 R6 = ROT R0 BY R1.L;
18 DBGA ( R6.L , 0x0002 );
19 DBGA ( R6.H , 0x0000 );
30 R6 = ROT R0 BY R1.L;
31 DBGA ( R6.L , 0x0000 );
32 DBGA ( R6.H , 0x4000 );
42 R6 = ROT R0 BY R1.L;
43 DBGA ( R6.L , 0x0000 );
44 DBGA ( R6.H , 0xa000 );
54 R6 = ROT R0 BY R1.L
[all...] |
| m15.s | 26 R7 = A1, R6 = A0 (S2RND);
29 DBGA ( R6.L , 0xffe0 );
30 DBGA ( R6.H , 0x1fff );
37 R7 = A1, R6 = A0 (S2RND);
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0 (S2RND);
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6 = A0 (ISS2)
[all...] |
| hwloop-lt-bits.s | 9 imm32 R6, 0xaaaa5555
10 R4 = R6;
13 LT0 = R6;
14 LT1 = R6;
|
| m3.s | 35 R6 = A1.w;
37 DBGA ( R6.L , 0x8000 );
38 DBGA ( R6.H , 0x3fff );
40 R6 = A0.w;
42 DBGA ( R6.L , 0x8000 );
43 DBGA ( R6.H , 0x3fff );
49 R6 = A1.w;
51 DBGA ( R6.L , 0x0000 );
52 DBGA ( R6.H , 0x4000 );
54 R6 = A0.w
[all...] |
| m13.s | 26 R7 = A1, R6 = A0;
29 DBGA ( R6.L , 0xfff0 );
30 DBGA ( R6.H , 0x7fff );
37 R7 = A1, R6 = A0;
40 DBGA ( R6.L , 0xffff );
41 DBGA ( R6.H , 0x7fff );
50 R7 = A1, R6 = A0;
53 DBGA ( R6.L , 0x0000 );
54 DBGA ( R6.H , 0x8000 );
61 R7 = A1, R6 = A0 (IS)
[all...] |
| s14.s | 20 R6 = ASHIFT R0 BY R3.L;
21 DBGA ( R6.L , 0x0000 );
22 DBGA ( R6.H , 0x8000 );
36 R6 = ASHIFT R0 BY R3.L;
37 DBGA ( R6.L , 0xffff );
38 DBGA ( R6.H , 0xffff );
52 R6 = ASHIFT R0 BY R3.L;
53 DBGA ( R6.L , 0xFF80 );
54 DBGA ( R6.H , 0xFFFF );
68 R6 = ASHIFT R0 BY R3.L
[all...] |
| disalnexcpt_implicit.S | 36 imm32 R6, 0x9abcdef0;
39 [SP - 4] = R6;
44 R6 = BYTEPACK (R0, R1) || R5 = [I##n ++ M##n]; EXP (R5, n); \
45 R5 = BYTEPACK (R0, R1) || R6 = [I##n++]; EXP (R6, n); \
54 (R6, R7) = BYTEUNPACK R3:2 || R5 = [I##n ++ M##n]; EXP (R5, n); \
55 (R5, R4) = BYTEUNPACK R1:0 || R6 = [I##n++]; EXP (R6, n); \
56 (R4, R6) = BYTEUNPACK R3:2 || R7 = [I##n--]; EXP (R7, n);
65 SAA (R1:0, R3:2) || R6 = [I##n++]; EXP (R6, n);
[all...] |
