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Searched refs:RADEON_TV_PLL_CNTL1 (Results 1 - 3 of 3) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_legacy_tv.c	762 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVCLK_SRC_SEL_TVPLL); 764 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVPLL_RESET, ~RADEON_TVPLL_RESET); 768 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_RESET); 773 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~0xf); 774 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, RADEON_TVCLK_SRC_SEL_TVPLL, ~RADEON_TVCLK_SRC_SEL_TVPLL); 776 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, (1 << RADEON_TVPDC_SHIFT), ~RADEON_TVPDC_MASK); 777 WREG32_PLL_P(RADEON_TV_PLL_CNTL1, 0, ~RADEON_TVPLL_SLEEP);
radeon_reg.h	`3643 #define RADEON_TV_PLL_CNTL1 0x0022 /* PLL */`
/src/sys/dev/pci/
radeonfbreg.h	`3519 #define RADEON_TV_PLL_CNTL1 0x0022 /* PLL */`

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