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  /src/sys/arch/hpcmips/stand/lcboot/
com.c 114 REGWRITE_1(VR4181_SIU_ADDR, com_data, c);
140 REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_DLAB);
142 REGWRITE_1(VR4181_SIU_ADDR, com_dlbl, rate);
143 REGWRITE_1(VR4181_SIU_ADDR, com_dlbh, rate >> 8);
149 REGWRITE_1(VR4181_SIU_ADDR, com_lcr, LCR_8BITS);
152 REGWRITE_1(VR4181_SIU_ADDR, com_ier, 0);
155 REGWRITE_1(VR4181_SIU_ADDR, com_fifo,
159 REGWRITE_1(VR4181_SIU_ADDR, com_mcr, MCR_DTR | MCR_RTS);
extern.h 83 #define REGWRITE_1(base, off, val) \
102 #define bus_space_write_1(iot, ioh, off, val) REGWRITE_1((ioh), (off), (val))
if_cs.c 74 #define CS_WRITE_1(off, val) REGWRITE_1(CS_IO_BASE, (off), (val))

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