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Searched refs:REG_SET_7 (Results 1 - 5 of 5) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_dpp_dscl.c	`217 REG_SET_7(LB_DATA_FORMAT, 0,`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_stream_encoder.c	`907 REG_SET_7(DP_SEC_CNTL, 0,`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_dsc.c	`591 REG_SET_7(DSCC_PPS_CONFIG1, 0,`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_hubp.c	`149 REG_SET_7(DCHUBP_REQ_SIZE_CONFIG_C, 0,`
/src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
reg_helper.h	`106 #define REG_SET_7(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \`

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