| /src/external/cddl/osnet/dev/dtrace/arm/ |
| regset.h | 47 #define REG_SP R12
|
| /src/external/cddl/osnet/dev/dtrace/mips/ |
| regset.h | 52 #define REG_SP SP
|
| /src/external/gpl3/binutils/dist/gas/config/ |
| tc-i386-ginsn.c | 36 || dw2reg_num == REG_SP /* rsp. */
226 /* FIXME - create ginsn where dest is REG_SP / REG_FP only ? */
240 destination register is REG_SP or REG_FP. */
557 GINSN_SRC_REG, REG_SP, 0,
559 GINSN_DST_REG, REG_SP, 0);
563 GINSN_DST_INDIRECT, REG_SP, 0);
567 GINSN_SRC_REG, REG_SP, 0,
593 GINSN_DST_REG, REG_SP, 0);
597 GINSN_SRC_INDIRECT, REG_SP, 0,
602 GINSN_SRC_REG, REG_SP, 0
[all...] |
| tc-aarch64-ginsn.c | 42 if (dw2reg_num == REG_SP /* x31. */
78 incorrect dependency on REG_SP. */
759 if (addr_reg == REG_SP || addr_reg == REG_FP)
761 /* For all skipped memory operations, check if an update to REG_SP or
793 /* For all skipped memory operations, check if an update to REG_SP or
796 && (addr_reg == REG_SP || addr_reg == REG_FP)
803 affecting REG_SP or REG_FP. */
809 if (dw2_regnum == REG_SP || dw2_regnum == REG_FP)
829 register for CFA tracking is limited to REG_SP and REG_FP only.
|
| /src/external/gpl3/binutils.old/dist/gas/config/ |
| tc-i386-ginsn.c | 36 || dw2reg_num == REG_SP /* rsp. */
226 /* FIXME - create ginsn where dest is REG_SP / REG_FP only ? */
240 destination register is REG_SP or REG_FP. */
557 GINSN_SRC_REG, REG_SP, 0,
559 GINSN_DST_REG, REG_SP, 0);
563 GINSN_DST_INDIRECT, REG_SP, 0);
567 GINSN_SRC_REG, REG_SP, 0,
593 GINSN_DST_REG, REG_SP, 0);
597 GINSN_SRC_INDIRECT, REG_SP, 0,
602 GINSN_SRC_REG, REG_SP, 0
[all...] |
| tc-aarch64-ginsn.c | 42 if (dw2reg_num == REG_SP /* x31. */
78 incorrect dependency on REG_SP. */
759 if (addr_reg == REG_SP || addr_reg == REG_FP)
761 /* For all skipped memory operations, check if an update to REG_SP or
793 /* For all skipped memory operations, check if an update to REG_SP or
796 && (addr_reg == REG_SP || addr_reg == REG_FP)
803 affecting REG_SP or REG_FP. */
809 if (dw2_regnum == REG_SP || dw2_regnum == REG_FP)
829 register for CFA tracking is limited to REG_SP and REG_FP only.
|
| /src/external/bsd/libproc/dist/ |
| proc_regs.c | 68 case REG_SP:
103 case REG_SP:
|
| libproc.h | 104 REG_SP,
|
| /src/external/gpl3/gcc/dist/libsanitizer/sanitizer_common/ |
| sanitizer_stoptheworld_linux_libcdep.cpp | 476 #define REG_SP ARM_sp
480 #define REG_SP uregs[13]
485 #define REG_SP esp
487 #define REG_SP rsp
502 #define REG_SP gpr[PT_R1]
507 # define REG_SP regs[EF_R29]
509 # define REG_SP regs[EF_REG29]
514 #define REG_SP sp
520 #define REG_SP regs[3]
526 // sys/ucontext.h already defines REG_SP as 2. Undefine it first
[all...] |
| /src/external/gpl3/binutils/dist/gas/ |
| scfi.c | 50 the CFA. REG_CFA itself, however, may have REG_SP or REG_FP as base
81 (callee-saved, REG_SP etc) registers. 'reg' is in the DWARF register
97 - REG_SP, REG_FP,
103 the REG_SP, and REG_FP registers. */
175 if (!ret && state1->regs[REG_CFA].base == REG_SP)
199 Note that BASE must be REG_CFA, because any other base (REG_SP, REG_FP)
256 && (ginsn_get_dst_reg (dst) == REG_SP
263 && ginsn_get_dst_reg (dst) == REG_SP)
288 && (ginsn_get_src_reg (src1) == REG_SP
295 && ginsn_get_src_reg (src1) == REG_SP)
[all...] |
| /src/external/gpl3/binutils.old/dist/gas/ |
| scfi.c | 50 the CFA. REG_CFA itself, however, may have REG_SP or REG_FP as base
81 (callee-saved, REG_SP etc) registers. 'reg' is in the DWARF register
97 - REG_SP, REG_FP,
103 the REG_SP, and REG_FP registers. */
175 if (!ret && state1->regs[REG_CFA].base == REG_SP)
199 Note that BASE must be REG_CFA, because any other base (REG_SP, REG_FP)
256 && (ginsn_get_dst_reg (dst) == REG_SP
263 && ginsn_get_dst_reg (dst) == REG_SP)
288 && (ginsn_get_src_reg (src1) == REG_SP
295 && ginsn_get_src_reg (src1) == REG_SP)
[all...] |
| /src/external/gpl3/gcc.old/dist/libsanitizer/sanitizer_common/ |
| sanitizer_stoptheworld_linux_libcdep.cpp | 475 #define REG_SP ARM_sp
479 #define REG_SP uregs[13]
484 #define REG_SP esp
486 #define REG_SP rsp
501 #define REG_SP gpr[PT_R1]
506 # define REG_SP regs[EF_R29]
508 # define REG_SP regs[EF_REG29]
513 #define REG_SP sp
519 // sys/ucontext.h already defines REG_SP as 2. Undefine it first.
520 #undef REG_SP
[all...] |
| /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/ |
| sanitizer_stoptheworld_linux_libcdep.cc | 475 #define REG_SP ARM_sp
479 #define REG_SP uregs[13]
484 #define REG_SP esp
486 #define REG_SP rsp
491 #define REG_SP gpr[PT_R1]
496 # define REG_SP regs[EF_R29]
498 # define REG_SP regs[EF_REG29]
503 #define REG_SP sp
508 #define REG_SP gprs[15]
561 *sp = regs.REG_SP;
[all...] |
| /src/external/gpl3/gdb.old/dist/gdb/ |
| microblaze-tdep.c | 53 ((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
55 ((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
57 ((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
59 ((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
61 ((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
63 ((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0
[all...] |
| nds32-tdep.c | 56 N32_TYPE2 (LDC, 0, REG_SP, 0)
631 if (CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_SP, REG_SP, 0))
645 else if (CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_FP, REG_SP, 0))
660 && N32_RA5 (insn) == REG_SP)
670 else if (insn == N32_ALU1 (ADD, REG_SP, REG_SP, REG_TA)
671 || insn == N32_ALU1 (ADD, REG_SP, REG_TA, REG_SP))
766 if (N32_RA5 (insn) == REG_SP)
[all...] |
| /src/external/gpl3/gdb/dist/gdb/ |
| microblaze-tdep.c | 53 ((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
55 ((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
57 ((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
59 ((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
61 ((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
63 ((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0
[all...] |
| nds32-tdep.c | 56 N32_TYPE2 (LDC, 0, REG_SP, 0)
631 if (CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_SP, REG_SP, 0))
645 else if (CHOP_BITS (insn, 15) == N32_TYPE2 (ADDI, REG_FP, REG_SP, 0))
660 && N32_RA5 (insn) == REG_SP)
670 else if (insn == N32_ALU1 (ADD, REG_SP, REG_SP, REG_TA)
671 || insn == N32_ALU1 (ADD, REG_SP, REG_TA, REG_SP))
766 if (N32_RA5 (insn) == REG_SP)
[all...] |
| /src/external/cddl/osnet/dev/dtrace/x86/ |
| regset.h | 169 #define REG_SP UESP
|
| /src/external/gpl3/gdb/dist/sim/mn10300/ |
| op_utils.c | 144 reg_t parm2 = load_word (State.regs[REG_SP] + 12);
145 reg_t parm3 = load_word (State.regs[REG_SP] + 16);
146 reg_t parm4 = load_word (State.regs[REG_SP] + 20);
|
| mn10300-sim.h | 52 #define SP (State.regs[REG_SP])
67 #define REG_SP 8
|
| /src/external/gpl3/gdb.old/dist/sim/mn10300/ |
| op_utils.c | 144 reg_t parm2 = load_word (State.regs[REG_SP] + 12);
145 reg_t parm3 = load_word (State.regs[REG_SP] + 16);
146 reg_t parm4 = load_word (State.regs[REG_SP] + 20);
|
| mn10300-sim.h | 52 #define SP (State.regs[REG_SP])
67 #define REG_SP 8
|
| /src/external/gpl3/gdb.old/dist/sim/avr/ |
| interp.c | 64 #define REG_SP 0x5D
734 unsigned int sp = read_word (REG_SP);
744 write_word (REG_SP, sp);
820 sram[REG_SP + 1], sram[REG_SP]);
903 unsigned int sp = read_word (REG_SP);
913 write_word (REG_SP, sp);
951 unsigned int sp = read_word (REG_SP);
953 write_word (REG_SP, sp);
960 unsigned int sp = read_word (REG_SP);
[all...] |
| /src/external/gpl3/gdb/dist/sim/avr/ |
| interp.c | 64 #define REG_SP 0x5D
734 unsigned int sp = read_word (REG_SP);
744 write_word (REG_SP, sp);
820 sram[REG_SP + 1], sram[REG_SP]);
903 unsigned int sp = read_word (REG_SP);
913 write_word (REG_SP, sp);
951 unsigned int sp = read_word (REG_SP);
953 write_word (REG_SP, sp);
960 unsigned int sp = read_word (REG_SP);
[all...] |
| /src/external/gpl3/binutils/dist/include/opcode/ |
| cris.h | 34 #define REG_SP (14)
|
