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    Searched refs:REG_UPDATE_SEQ_2 (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
amdgpu_dce_aux.c 197 REG_UPDATE_SEQ_2(AUXN_IMPCAL,
201 REG_UPDATE_SEQ_2(AUXP_IMPCAL,
206 REG_UPDATE_SEQ_2(AUXN_IMPCAL,
212 REG_UPDATE_SEQ_2(AUXP_IMPCAL,
500 REG_UPDATE_SEQ_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, length, AUX_RX_TIMEOUT_LEN_MUL, multiplier);
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
amdgpu_dcn10_hubbub.c 303 REG_UPDATE_SEQ_2(DCHUBBUB_ARB_WATERMARK_CHANGE_CNTL,
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
reg_helper.h 384 #define REG_UPDATE_SEQ_2(reg, f1, v1, f2, v2) \

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