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  /src/external/gpl3/binutils/dist/opcodes/
s390-opc.c 74 #define RE_8 (R_32 + 1) /* GPR starting at position 8 */
76 #define RE_12 (RE_8 + 1) /* GPR starting at position 12 */
405 #define INSTR_RR_RER 2, { RE_8,R_12,0,0,0,0 } /* e.g. dr */
413 #define INSTR_RSE_RERERD 6, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. mvclu */
421 #define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */
430 #define INSTR_RS_RE0RD 4, { RE_8,D_20,B_16,0,0,0 } /* e.g. slda */
432 #define INSTR_RS_RERERD 4, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. cds */
438 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. dsg */
444 #define INSTR_RXY_RERRD 6, { RE_8,D20_20,X_12,B_16,0,0 } /* e.g. dsg */
452 #define INSTR_RX_RERRD 4, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. d *
    [all...]
  /src/external/gpl3/binutils.old/dist/opcodes/
s390-opc.c 74 #define RE_8 (R_32 + 1) /* GPR starting at position 8 */
76 #define RE_12 (RE_8 + 1) /* GPR starting at position 12 */
405 #define INSTR_RR_RER 2, { RE_8,R_12,0,0,0,0 } /* e.g. dr */
413 #define INSTR_RSE_RERERD 6, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. mvclu */
421 #define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */
430 #define INSTR_RS_RE0RD 4, { RE_8,D_20,B_16,0,0,0 } /* e.g. slda */
432 #define INSTR_RS_RERERD 4, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. cds */
438 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. dsg */
444 #define INSTR_RXY_RERRD 6, { RE_8,D20_20,X_12,B_16,0,0 } /* e.g. dsg */
452 #define INSTR_RX_RERRD 4, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. d *
    [all...]
  /src/external/gpl3/gdb/dist/opcodes/
s390-opc.c 74 #define RE_8 (R_32 + 1) /* GPR starting at position 8 */
76 #define RE_12 (RE_8 + 1) /* GPR starting at position 12 */
405 #define INSTR_RR_RER 2, { RE_8,R_12,0,0,0,0 } /* e.g. dr */
413 #define INSTR_RSE_RERERD 6, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. mvclu */
421 #define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */
430 #define INSTR_RS_RE0RD 4, { RE_8,D_20,B_16,0,0,0 } /* e.g. slda */
432 #define INSTR_RS_RERERD 4, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. cds */
438 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. dsg */
444 #define INSTR_RXY_RERRD 6, { RE_8,D20_20,X_12,B_16,0,0 } /* e.g. dsg */
452 #define INSTR_RX_RERRD 4, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. d *
    [all...]
  /src/external/gpl3/gdb.old/dist/opcodes/
s390-opc.c 72 #define RE_8 (R_32 + 1) /* GPR starting at position 8 */
74 #define RE_12 (RE_8 + 1) /* GPR starting at position 12 */
415 #define INSTR_RR_RER 2, { RE_8,R_12,0,0,0,0 } /* e.g. dr */
423 #define INSTR_RSE_RERERD 6, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. mvclu */
431 #define INSTR_RSY_RERERD 6, { RE_8,RE_12,D20_20,B_16,0,0 } /* e.g. cdsy */
440 #define INSTR_RS_RE0RD 4, { RE_8,D_20,B_16,0,0,0 } /* e.g. slda */
442 #define INSTR_RS_RERERD 4, { RE_8,RE_12,D_20,B_16,0,0 } /* e.g. cds */
448 #define INSTR_RXE_RERRD 6, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. dsg */
454 #define INSTR_RXY_RERRD 6, { RE_8,D20_20,X_12,B_16,0,0 } /* e.g. dsg */
462 #define INSTR_RX_RERRD 4, { RE_8,D_20,X_12,B_16,0,0 } /* e.g. d *
    [all...]

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