HomeSort by: relevance | last modified time | path
    Searched refs:RHS2 (Results 1 - 8 of 8) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/Support/
InstructionCost.h 87 InstructionCost RHS2(RHS);
88 *this += RHS2;
99 InstructionCost RHS2(RHS);
100 *this -= RHS2;
111 InstructionCost RHS2(RHS);
112 *this *= RHS2;
123 InstructionCost RHS2(RHS);
124 *this /= RHS2;
170 InstructionCost RHS2(RHS);
171 return *this == RHS2;
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/ADT/
SparseBitVector.h 238 // RHS1 & ~RHS2 into this element
240 const SparseBitVectorElement &RHS2,
246 Bits[i] = RHS1.Bits[i] & ~RHS2.Bits[i];
686 // Result of RHS1 & ~RHS2 is stored into this bitmap.
688 const SparseBitVector<ElementSize> &RHS2)
691 intersectWithComplement(RHS2);
693 } else if (this == &RHS2) {
694 SparseBitVector RHS2Copy(RHS2);
702 ElementListConstIter Iter2 = RHS2.Elements.begin();
705 // If RHS2 is empty, we still have to copy RHS
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
InstCombineSelect.cpp 2926 Value *LHS2, *RHS2;
2927 if (SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor)
2929 RHS2, SI, SPF, RHS))
2931 if (SelectPatternFlavor SPF2 = matchSelectPattern(RHS, LHS2, RHS2).Flavor)
2933 RHS2, SI, SPF, LHS))
InstCombineCompares.cpp 2694 Value *LHS2, *RHS2;
2695 if (!match(UnequalVal, m_Select(m_ICmp(PredB, m_Value(LHS2), m_Value(RHS2)),
2702 std::swap(LHS2, RHS2);
2708 if (PredB == ICmpInst::ICMP_SGT && isa<Constant>(RHS2)) {
2712 PredB, cast<Constant>(RHS2));
2716 RHS2 = FlippedStrictness->second;
2721 return PredB == ICmpInst::ICMP_SLT && RHS == RHS2;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRISelLowering.cpp 683 SDValue RHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, RHS_1,
696 Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp);
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
ValueTracking.cpp 2788 const Value *LHS2 = nullptr, *RHS2 = nullptr;
2789 SelectPatternFlavor SPF2 = matchSelectPattern(LHS, LHS2, RHS2).Flavor;
2793 if (!match(RHS2, m_APInt(CHigh)))
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 5421 SDValue RHS1, RHS2;
5423 expandf64Toi32(RHS, DAG, RHS1, RHS2);
5425 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask);
5429 SDValue Ops[] = { Chain, ARMcc, LHS1, LHS2, RHS1, RHS2, Dest };
11504 Register RHS2 = MI.getOperand(4).getReg();
11510 .addReg(LHS2).addReg(RHS2)
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 6091 SDValue RHS1, RHS2;
6092 std::tie(RHS1, RHS2) = splitVector(Op.getOperand(1), DAG, dl);
6098 DAG.getNode(Op.getOpcode(), dl, HiVT, LHS2, RHS2));
22768 SDValue RHS1, RHS2;
22769 std::tie(RHS1, RHS2) = splitVector(RHS, DAG, dl);
22776 DAG.getNode(ISD::SETCC, dl, HiVT, LHS2, RHS2, CC));
    [all...]

Completed in 108 milliseconds