HomeSort by: relevance | last modified time | path
    Searched refs:RING_CTL (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_ring_submission.c 643 ENGINE_WRITE(engine, RING_CTL, 0);
665 ENGINE_READ(engine, RING_CTL),
674 ENGINE_READ(engine, RING_CTL),
711 ENGINE_WRITE(engine, RING_CTL, RING_CTL_SIZE(ring->size) | RING_VALID);
715 RING_CTL(engine->mmio_base),
721 ENGINE_READ(engine, RING_CTL),
722 ENGINE_READ(engine, RING_CTL) & RING_VALID,
783 intel_uncore_write_fw(uncore, RING_CTL(base), 0);
intel_gt.c 56 intel_uncore_write(uncore, RING_CTL(base), 0);
intel_engine_cs.c 1301 ENGINE_READ(engine, RING_CTL),
1302 ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : "");
selftest_lrc.c 3781 i915_mmio_reg_offset(RING_CTL(engine->mmio_base)),
3783 "RING_CTL"
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_pmu.c 307 val = ENGINE_READ_FW(engine, RING_CTL);
i915_gpu_error.c 1156 ee->ctl = ENGINE_READ(engine, RING_CTL);
i915_reg.h 2499 #define RING_CTL(base) _MMIO((base) + 0x3c)
  /src/sys/external/bsd/drm2/dist/drm/i915/gvt/
handlers.c 1924 MMIO_RING_DFH(RING_CTL, D_ALL, F_CMD_ACCESS, NULL, NULL);

Completed in 42 milliseconds