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    Searched refs:RISCVISD (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 489 // Integer VTs are lowered as a series of "RISCVISD::TRUNCATE_VECTOR_VL"
1287 SDValue Mask = DAG.getNode(RISCVISD::VMSET_VL, DL, MaskVT, VL);
1332 VT.isFloatingPoint() ? RISCVISD::VFMV_V_F_VL : RISCVISD::VMV_V_X_VL;
1353 SDValue VMClr = DAG.getNode(RISCVISD::VMCLR_VL, DL, ContainerVT, VL);
1358 SDValue VMSet = DAG.getNode(RISCVISD::VMSET_VL, DL, ContainerVT, VL);
1459 unsigned Opc = VT.isFloatingPoint() ? RISCVISD::VFMV_V_F_VL
1460 : RISCVISD::VMV_V_X_VL;
1475 SDValue VID = DAG.getNode(RISCVISD::VID_VL, DL, ContainerVT, Mask, VL);
1530 DAG.getNode(RISCVISD::VMV_V_X_VL, DL, ViaContainerVT
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RISCVISelDAGToDAG.cpp 1140 case RISCVISD::VMV_V_X_VL:
1141 case RISCVISD::VFMV_V_F_VL: {
1340 N.getOpcode() != RISCVISD::SPLAT_VECTOR_I64 &&
1341 N.getOpcode() != RISCVISD::VMV_V_X_VL)
1354 N.getOpcode() != RISCVISD::SPLAT_VECTOR_I64 &&
1355 N.getOpcode() != RISCVISD::VMV_V_X_VL) ||
1361 // ISD::SPLAT_VECTOR, RISCVISD::SPLAT_VECTOR_I64 and RISCVISD::VMV_V_X_VL
1403 N.getOpcode() != RISCVISD::SPLAT_VECTOR_I64 &&
1404 N.getOpcode() != RISCVISD::VMV_V_X_VL) |
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RISCVISelLowering.h 24 namespace RISCVISD {
267 } // namespace RISCVISD

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