| /src/external/gpl3/binutils/dist/opcodes/ |
| s390-opc.c | 63 #define R_24 (R_20 + 1) /* GPR starting at position 24 */
65 #define R_28 (R_24 + 1) /* GPR starting at position 28 */
352 #define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
353 #define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
355 #define INSTR_RRE_RFE 4, { R_24,FE_28,0,0,0,0 } /* e.g. csxtr */
356 #define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
370 #define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. ipte */
371 #define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
372 #define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte *
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| s390-opc.c | 63 #define R_24 (R_20 + 1) /* GPR starting at position 24 */
65 #define R_28 (R_24 + 1) /* GPR starting at position 28 */
352 #define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
353 #define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
355 #define INSTR_RRE_RFE 4, { R_24,FE_28,0,0,0,0 } /* e.g. csxtr */
356 #define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
370 #define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. ipte */
371 #define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
372 #define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte *
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| s390-opc.c | 63 #define R_24 (R_20 + 1) /* GPR starting at position 24 */
65 #define R_28 (R_24 + 1) /* GPR starting at position 28 */
352 #define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
353 #define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
354 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
355 #define INSTR_RRE_RFE 4, { R_24,FE_28,0,0,0,0 } /* e.g. csxtr */
356 #define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
370 #define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. ipte */
371 #define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
372 #define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte *
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| s390-opc.c | 61 #define R_24 (R_20 + 1) /* GPR starting at position 24 */
63 #define R_28 (R_24 + 1) /* GPR starting at position 28 */
362 #define INSTR_RRE_R0 4, { R_24,0,0,0,0,0 } /* e.g. ipm */
363 #define INSTR_RRE_RA 4, { R_24,A_28,0,0,0,0 } /* e.g. ear */
364 #define INSTR_RRE_RF 4, { R_24,F_28,0,0,0,0 } /* e.g. lgdr */
365 #define INSTR_RRE_RFE 4, { R_24,FE_28,0,0,0,0 } /* e.g. csxtr */
366 #define INSTR_RRE_RR 4, { R_24,R_28,0,0,0,0 } /* e.g. lura */
380 #define INSTR_RRF_RURR 4, { R_24,R_28,R_16,U4_20,0,0 } /* e.g. ipte */
381 #define INSTR_RRF_RURR2 4, { R_24,R_16,R_28,U4_20,0,0 } /* e.g. lptea */
382 #define INSTR_RRF_R0RR 4, { R_24,R_16,R_28,0,0,0 } /* e.g. idte *
[all...] |
