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    Searched refs:R_IMR_MAILBOX_CLR_CPU (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/arch/evbmips/sbmips/
sb1250_icu.c 198 WRITE_REG(cpu->sb1cpu_imr_base + R_IMR_MAILBOX_CLR_CPU, mbox_mask);
  /src/sys/arch/sbmips/sbmips/
sb1250_icu.c 198 WRITE_REG(cpu->sb1cpu_imr_base + R_IMR_MAILBOX_CLR_CPU, mbox_mask);
  /src/sys/arch/mips/sibyte/include/
sb1250_regs.h 738 #define R_IMR_MAILBOX_CLR_CPU 0x00D0

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