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    Searched refs:RegBitWidth (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/AArch64/
Target.cpp 15 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) {
16 switch (RegBitWidth) {
26 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth,
28 if (Value.getBitWidth() > RegBitWidth)
30 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth))
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/PowerPC/
Target.cpp 43 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) {
44 switch (RegBitWidth) {
54 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth,
56 if (Value.getBitWidth() > RegBitWidth)
61 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth))
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/X86/
Target.cpp 431 static unsigned getLoadImmediateOpcode(unsigned RegBitWidth) {
432 switch (RegBitWidth) {
446 static MCInst loadImmediate(unsigned Reg, unsigned RegBitWidth,
448 if (Value.getBitWidth() > RegBitWidth)
450 return MCInstBuilder(getLoadImmediateOpcode(RegBitWidth))
503 std::vector<MCInst> loadAndFinalize(unsigned Reg, unsigned RegBitWidth,
531 unsigned RegBitWidth,
533 assert((RegBitWidth & 7) == 0 && "RegBitWidth must be a multiple of 8 bits");
534 initStack(RegBitWidth / 8)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIRegisterInfo.cpp 2223 const unsigned RegBitWidth = AMDGPU::getRegBitWidth(*RC->MC);
2224 assert(RegBitWidth >= 32 && RegBitWidth <= 1024);
2226 const unsigned RegDWORDs = RegBitWidth / 32;

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