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    Searched refs:RegSizeInfoByHwMode (Results 1 - 4 of 4) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
InfoByHwMode.cpp 10 // and RegSizeInfoByHwMode (parameterized register/spill size and alignment
141 RegSizeInfoByHwMode::RegSizeInfoByHwMode(Record *R,
151 bool RegSizeInfoByHwMode::operator< (const RegSizeInfoByHwMode &I) const {
156 bool RegSizeInfoByHwMode::operator== (const RegSizeInfoByHwMode &I) const {
161 bool RegSizeInfoByHwMode::isSubClassOf(const RegSizeInfoByHwMode &I) const {
166 bool RegSizeInfoByHwMode::hasStricterSpillThan(const RegSizeInfoByHwMode &I
    [all...]
InfoByHwMode.h 10 // and RegSizeInfoByHwMode (parameterized register/spill size and alignment
168 struct RegSizeInfoByHwMode : public InfoByHwMode<RegSizeInfo> {
169 RegSizeInfoByHwMode(Record *R, const CodeGenHwModes &CGH);
170 RegSizeInfoByHwMode() = default;
171 bool operator< (const RegSizeInfoByHwMode &VI) const;
172 bool operator== (const RegSizeInfoByHwMode &VI) const;
173 bool operator!= (const RegSizeInfoByHwMode &VI) const {
177 bool isSubClassOf(const RegSizeInfoByHwMode &I) const;
178 bool hasStricterSpillThan(const RegSizeInfoByHwMode &I) const;
189 raw_ostream &operator<<(raw_ostream &OS, const RegSizeInfoByHwMode &T)
    [all...]
CodeGenRegisters.h 330 RegSizeInfoByHwMode RSI;
459 RegSizeInfoByHwMode RSI;
461 Key(const CodeGenRegister::Vec *M, const RegSizeInfoByHwMode &I)
467 // Lexicographical order of (Members, RegSizeInfoByHwMode).
CodeGenRegisters.cpp 786 RSI = RegSizeInfoByHwMode(DI->getDef(), RegBank.getHwModes());

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