| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VETargetTransformInfo.h | 53 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyTargetTransformInfo.h | 60 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| WebAssemblyTargetTransformInfo.cpp | 40 TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXTargetTransformInfo.h | 74 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 53 enum RegisterKind {
106 RegisterKind Kind;
169 createReg(RegisterKind Kind, unsigned Num, SMLoc StartLoc, SMLoc EndLoc) {
184 createMem(MemoryKind MemKind, RegisterKind RegKind, unsigned Base,
222 bool isReg(RegisterKind RegKind) const {
263 bool isMem(MemoryKind MemKind, RegisterKind RegKind) const {
266 bool isMemDisp12(MemoryKind MemKind, RegisterKind RegKind) const {
269 bool isMemDisp20(MemoryKind MemKind, RegisterKind RegKind) const {
272 bool isMemDisp12Len4(RegisterKind RegKind) const {
275 bool isMemDisp12Len8(RegisterKind RegKind) const
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUTargetTransformInfo.h | 124 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind Vector) const;
247 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind Vector) const;
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| AMDGPUTargetTransformInfo.cpp | 318 GCNTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
1262 R600TTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVTargetTransformInfo.h | 60 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZTargetTransformInfo.h | 68 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| SystemZTargetTransformInfo.cpp | 329 SystemZTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugValues/ |
| VarLocBasedImpl.cpp | 235 /// RegisterKind.
239 /// locations of kind RegisterKind.
266 /// Get the start of the interval reserved for VarLocs of kind RegisterKind
331 RegisterKind,
358 /// single MachineLoc of RegisterKind.
368 case MachineLocKind::RegisterKind:
386 case MachineLocKind::RegisterKind:
439 Kind = MachineLocKind::RegisterKind;
461 VL.Locs[0].Kind == MachineLocKind::RegisterKind);
477 VL.Locs[0].Kind == MachineLocKind::RegisterKind);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonTargetTransformInfo.h | 84 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| HexagonTargetTransformInfo.cpp | 102 HexagonTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCTargetTransformInfo.h | 98 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
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| PPCTargetTransformInfo.cpp | 876 PPCTTIImpl::getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| AMDGPUAsmParser.cpp | 46 enum RegisterKind { IS_UNKNOWN, IS_VGPR, IS_SGPR, IS_AGPR, IS_TTMP, IS_SPECIAL };
1153 void usesRegister(RegisterKind RegKind, unsigned DwordRegIndex, unsigned RegWidth) {
1232 RegisterKind RegKind, unsigned Reg1, SMLoc Loc);
1233 bool ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
1236 bool ParseAMDGPURegister(RegisterKind &RegKind, unsigned &Reg,
1239 unsigned ParseRegularReg(RegisterKind &RegKind, unsigned &RegNum,
1242 unsigned ParseSpecialReg(RegisterKind &RegKind, unsigned &RegNum,
1245 unsigned ParseRegList(RegisterKind &RegKind, unsigned &RegNum,
1248 unsigned getRegularReg(RegisterKind RegKind,
1255 Optional<StringRef> getGprCountSymbolName(RegisterKind RegKind)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.h | 109 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.h | 159 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.h | 118 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| SparcAsmParser.cpp | 209 enum RegisterKind {
239 RegisterKind Kind;
442 Op->Reg.Kind = (SparcOperand::RegisterKind)Kind;
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| /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | 929 enum RegisterKind { RGK_Scalar, RGK_FixedWidthVector, RGK_ScalableVector };
932 TypeSize getRegisterBitWidth(RegisterKind K) const;
1574 virtual TypeSize getRegisterBitWidth(RegisterKind K) const = 0;
2020 TypeSize getRegisterBitWidth(RegisterKind K) const override {
|
| TargetTransformInfoImpl.h | 390 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 378 RegKind RegisterKind;
1225 VectorList.RegisterKind == VectorKind;
1235 if (VectorList.RegisterKind != VectorKind)
1916 unsigned ElementWidth, RegKind RegisterKind, SMLoc S, SMLoc E,
1923 Op->VectorList.RegisterKind = RegisterKind;
5687 RegKind RegisterKind = RegKind::Scalar;
5693 RegisterKind = RegKind::NeonVector;
5705 RegisterKind = RegKind::SVEDataVector;
5719 RegisterKind = RegKind::SVEPredicateVector
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| TargetTransformInfo.cpp | 588 TargetTransformInfo::RegisterKind K) const {
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| BasicTTIImpl.h | 651 TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const {
|
