| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.h | 48 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
|
| MipsSEISelLowering.h | 69 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
|
| Mips16ISelLowering.cpp | 410 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
489 RegsToPass.push_front(std::make_pair(V0Reg, Callee));
497 RegsToPass.push_front(std::make_pair((unsigned)Mips::T9, Callee));
502 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal,
|
| MipsISelLowering.cpp | 3021 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
3038 RegsToPass.push_back(std::make_pair(GPReg, getGlobalReg(CLI.DAG, Ty)));
3047 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
3048 Chain = CLI.DAG.getCopyToReg(Chain, CLI.DL, RegsToPass[i].first,
3049 RegsToPass[i].second, InFlag);
3055 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
3056 Ops.push_back(CLI.DAG.getRegister(RegsToPass[i].first,
3057 RegsToPass[i].second.getValueType()));
3246 std::deque<std::pair<unsigned, SDValue>> RegsToPass;
3270 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg
[all...] |
| MipsISelLowering.h | 487 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
573 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
|
| MipsSEISelLowering.cpp | 1164 std::deque<std::pair<unsigned, SDValue>> &RegsToPass,
1169 MipsTargetLowering::getOpndList(Ops, RegsToPass, IsPICCall, GlobalOrExternal,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCISelLowering.cpp | 256 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
283 // RegsToPass vector
285 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
313 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
314 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
315 RegsToPass[i].second, Glue);
338 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
339 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
340 RegsToPass[i].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 652 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
683 // Arguments that can be passed on register must be kept at RegsToPass
686 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
714 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
715 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
716 RegsToPass[I].second, InFlag);
747 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
748 Ops.push_back(DAG.getRegister(RegsToPass[I].first,
749 RegsToPass[I].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 776 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
867 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Part0));
871 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Part1));
899 // RegsToPass vector
902 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
906 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
931 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
932 Register Reg = toCallerWindow(RegsToPass[i].first);
933 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag);
956 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 414 SmallVector<std::pair<unsigned, SDValue>, MaxArgs> RegsToPass;
440 // Push arguments into RegsToPass vector
442 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
452 for (auto &Reg : RegsToPass) {
478 for (auto &Reg : RegsToPass)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 821 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
846 // Arguments that can be passed on register must be kept at RegsToPass
849 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
887 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
888 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
889 RegsToPass[i].second, InFlag);
909 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
910 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
911 RegsToPass[i].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 1137 SmallVector<std::pair<unsigned, SDValue>, 4> RegsToPass;
1161 // RegsToPass vector
1163 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1186 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
1187 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
1188 RegsToPass[i].second, InFlag);
1211 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
1212 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
1213 RegsToPass[i].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kISelLowering.cpp | 577 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
627 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
650 RegsToPass.push_back(std::make_pair(unsigned(F.PReg), Val));
717 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
718 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first,
719 RegsToPass[i].second, InFlag);
778 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
779 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
780 RegsToPass[i].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VEISelLowering.cpp | 582 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
635 RegsToPass.push_back(std::make_pair(VE::SX12, Callee));
675 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
702 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
703 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[i].first,
704 RegsToPass[i].second, InGlue);
711 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
712 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
713 RegsToPass[i].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 455 SmallVector<std::pair<unsigned, SDValue>, 16> RegsToPass;
516 // Arguments that can be passed on register must be kept at RegsToPass
519 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
544 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
545 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
546 RegsToPass[i].second, Glue);
561 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
562 Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first,
563 RegsToPass[i].second, Glue);
590 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 5410 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
5462 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
5463 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
5464 RegsToPass[i].second.getValueType()));
5491 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue,
5514 buildCallOperands(Ops, CFlags, dl, DAG, RegsToPass, Glue, Chain, Callee,
5747 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
5814 RegsToPass.push_back(std::make_pair(VA.getLocReg(), SVal.getValue(0)));
5817 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),
5820 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg))
[all...] |
| PPCISelLowering.h | 1243 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRISelLowering.cpp | 1274 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
1311 // Arguments that can be passed on registers must be kept in the RegsToPass
1313 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1344 for (auto Reg : RegsToPass) {
1357 for (auto Reg : RegsToPass) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.h | 340 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
|
| SIISelLowering.cpp | 2685 SmallVectorImpl<std::pair<unsigned, SDValue>> &RegsToPass,
2751 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg);
2821 RegsToPass.emplace_back(OutgoingArg->getRegister(), InputReg);
3006 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
3017 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain);
3050 RegsToPass.emplace_back(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3, ScratchRSrcReg);
3087 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
3154 passSpecialInputs(CLI, CCInfo, *Info, RegsToPass, MemOpChains, Chain);
3163 for (auto &RegToPass : RegsToPass) {
3220 for (auto &RegToPass : RegsToPass) {
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 752 SDValue &Arg, RegsToPassVector &RegsToPass,
|
| ARMISelLowering.cpp | 2198 RegsToPassVector &RegsToPass,
2206 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd.getValue(id)));
2209 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), fmrrd.getValue(1-id)));
2312 RegsToPassVector RegsToPass;
2371 PassF64ArgInRegs(dl, DAG, Chain, Op0, RegsToPass, VA, ArgLocs[++i],
2376 PassF64ArgInRegs(dl, DAG, Chain, Op1, RegsToPass, VA, ArgLocs[++i],
2385 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i],
2399 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
2424 RegsToPass.push_back(std::make_pair(j, Load));
2465 for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 1579 SmallVector<std::pair<unsigned, SDValue>, 9> RegsToPass;
1626 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
1667 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I) {
1668 Chain = DAG.getCopyToReg(Chain, DL, RegsToPass[I].first,
1669 RegsToPass[I].second, Glue);
1680 for (unsigned I = 0, E = RegsToPass.size(); I != E; ++I)
1681 Ops.push_back(DAG.getRegister(RegsToPass[I].first,
1682 RegsToPass[I].second.getValueType()));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVISelLowering.cpp | 7508 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass;
7526 RegsToPass.push_back(std::make_pair(RegLo, Lo));
7540 RegsToPass.push_back(std::make_pair(RegHigh, Hi));
7602 RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue));
7628 for (auto &Reg : RegsToPass) {
7636 validateCCReservedRegs(RegsToPass, MF);
7671 for (auto &Reg : RegsToPass)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 2654 SmallVectorImpl<std::pair<Register, SDValue>> &RegsToPass, CCValAssign &VA,
2673 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Lo));
2674 RegsToPass.push_back(std::make_pair(NextVA.getLocReg(), Hi));
4061 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass;
4143 Passv64i1ArgInRegs(dl, DAG, Arg, RegsToPass, VA, ArgLocs[++I], Subtarget);
4145 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
4160 RegsToPass.push_back(std::make_pair(ShadowReg, Arg));
4183 RegsToPass.push_back(std::make_pair(
4222 RegsToPass.push_back(std::make_pair(Register(X86::AL),
4231 RegsToPass.push_back(std::make_pair(F.PReg, Val))
[all...] |
