| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonISelLoweringHVX.cpp | 314 HexagonTargetLowering::getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops,
319 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, ResTy, IntOps);
466 MVT ResTy = tyVector(OpTy, MVT::i8);
480 assert(ResTy.getVectorNumElements() == ByteMask.size());
481 return DAG.getVectorShuffle(ResTy, dl, opCastElem(Op0, MVT::i8, DAG),
807 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const {
831 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const {
833 assert(ResTy == MVT::i1);
911 const SDLoc &dl, MVT ResTy, SelectionDAG &DAG) const {
931 if (VecTy == ResTy)
[all...] |
| HexagonISelDAGToDAGHVX.cpp | 867 bool scalarizeShuffle(ArrayRef<int> Mask, const SDLoc &dl, MVT ResTy,
1418 MVT ResTy, SDValue Va, SDValue Vb,
1421 MVT ElemTy = ResTy.getVectorElementType();
1481 LV = DAG.getNode(ISD::CONCAT_VECTORS, dl, ResTy, {L0, L1});
1483 SDValue BV = DAG.getBuildVector(ResTy, dl, Ops);
1488 SDValue IS = DAG.getNode(HexagonISD::ISEL, dl, ResTy, LV);
1510 MVT ResTy = getSingleVT(MVT::i8);
1553 Results.push(Hexagon::V6_vdealb4w, ResTy, {Vb, Va});
1583 Res.Ty = ResTy;
1613 Res.Ty = ResTy;
[all...] |
| HexagonISelLowering.h | 357 MVT ValTy, MVT ResTy, SelectionDAG &DAG) const;
365 SDValue appendUndef(SDValue Val, MVT ResTy, SelectionDAG &DAG) const;
382 SDValue getInt(unsigned IntId, MVT ResTy, ArrayRef<SDValue> Ops,
439 MVT ResTy, SelectionDAG &DAG) const;
441 MVT ResTy, SelectionDAG &DAG) const;
447 MVT ResTy, SelectionDAG &DAG) const;
449 MVT ResTy, SelectionDAG &DAG) const;
454 SDValue extendHvxVectorPred(SDValue VecV, const SDLoc &dl, MVT ResTy,
456 SDValue compressHvxPred(SDValue VecQ, const SDLoc &dl, MVT ResTy,
|
| HexagonISelDAGToDAG.h | 125 SDValue selectUndef(const SDLoc &dl, MVT ResTy) {
126 SDNode *U = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy);
|
| HexagonISelDAGToDAG.cpp | 771 MVT ResTy = N->getValueType(0).getSimpleVT();
772 if (HST->isHVXVectorType(ResTy, true))
776 unsigned VecLen = ResTy.getSizeInBits();
803 SDValue E = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, dl, ResTy,
810 SDNode *VA = CurDAG->getMachineNode(Hexagon::S2_valignrb, dl, ResTy,
841 MVT ResTy = N->getValueType(0).getSimpleVT();
842 SDNode *T = CurDAG->getMachineNode(Hexagon::C2_mask, SDLoc(N), ResTy,
849 MVT ResTy = N->getValueType(0).getSimpleVT();
851 SDNode *T = CurDAG->getMachineNode(Hexagon::A4_vcmpbgtui, dl, ResTy,
858 MVT ResTy = N->getValueType(0).getSimpleVT()
[all...] |
| HexagonISelLowering.cpp | 1036 MVT ResTy = ty(Op);
1044 return DAG.getSetCC(dl, ResTy,
1050 if (ResTy.isVector())
1082 return DAG.getSetCC(dl, ResTy,
2309 MVT ResTy = ty(Op);
2312 assert(ResTy.getSizeInBits() == InpTy.getSizeInBits());
2317 if (ResTy == MVT::v8i1) {
2320 return getInstr(Hexagon::C2_tfrrp, dl, ResTy, Ext, DAG);
2502 const SDLoc &dl, MVT ValTy, MVT ResTy,
2557 return DAG.getNode(HexagonISD::D2P, dl, ResTy, T1)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 413 EVT ResTy = Op->getValueType(0);
420 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1),
1365 EVT ResTy = Op->getValueType(0);
1368 SDValue Result = DAG.getNode(Opc, DL, ResTy, Vec, Idx,
1509 EVT ResTy = Op->getValueType(0);
1512 MVT ResEltTy = ResTy == MVT::v2i64 ? MVT::i64 : MVT::i32;
1515 SDValue SplatVec = getBuildVectorSplat(ResTy, ConstValue, BigEndian, DAG);
1517 return DAG.getNode(ISD::AND, DL, ResTy, Vec, SplatVec);
1521 EVT ResTy = Op->getValueType(0);
1523 SDValue One = DAG.getConstant(1, DL, ResTy);
[all...] |
| MipsSEISelDAGToDAG.cpp | 978 MVT ResTy = Node->getSimpleValueType(0);
989 if (ResTy != MVT::i32 && ResTy != MVT::i64)
993 if (ResTy == MVT::i32) {
1010 ReplaceNode(Node, CurDAG->getMachineNode(Opcode, DL, ResTy, Ops));
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| MachineIRBuilder.cpp | 492 LLT ResTy = Res.getLLTTy(*getMRI());
494 ResTy, APInt::getLowBitsSet(ResTy.getScalarSizeInBits(), ImmOp));
556 LLT ResTy = getMRI()->getType(Res);
567 if (MaybeMerge && Ops.size() * OpSize == ResTy.getSizeInBits()) {
572 Register ResIn = getMRI()->createGenericVirtualRegister(ResTy);
578 : getMRI()->createGenericVirtualRegister(ResTy);
979 void MachineIRBuilder::validateSelectOp(const LLT ResTy, const LLT TstTy,
982 assert((ResTy.isScalar() || ResTy.isVector() || ResTy.isPointer()) &
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 1256 OperandMatchResultTy ResTy;
1258 ResTy = parseAnyReg(Operands);
1260 ResTy = parseVR128(Operands);
1262 ResTy = parseBDXAddr64(Operands);
1264 ResTy = parseBDAddr64(Operands);
1266 ResTy = parseBDVAddr64(Operands);
1268 ResTy = parsePCRel32(Operands);
1270 ResTy = parsePCRel16(Operands);
1284 ResTy = MatchOperand_Success;
1287 if (ResTy != MatchOperand_Success
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/ |
| SparcAsmParser.cpp | 928 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
933 if (ResTy == MatchOperand_Success || ResTy == MatchOperand_ParseFail)
934 return ResTy;
955 ResTy = MatchOperand_Success;
957 ResTy = parseMEMOperand(Operands);
960 if (ResTy != MatchOperand_Success)
961 return ResTy;
973 ResTy = parseSparcAsmOperand(Op, false);
974 if (ResTy != MatchOperand_Success || !Op
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/AsmParser/ |
| VEAsmParser.cpp | 1401 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
1406 if (ResTy == MatchOperand_Success || ResTy == MatchOperand_ParseFail)
1407 return ResTy;
1444 ResTy = parseVEAsmOperand(Op);
1445 if (ResTy != MatchOperand_Success || !Op)
1460 ResTy = parseVEAsmOperand(Op2);
1461 if (ResTy != MatchOperand_Success || !Op2)
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPULegalizerInfo.cpp | 3067 LLT ResTy = MRI.getType(Res);
3089 auto FNeg = B.buildFNeg(ResTy, RHS, Flags);
3100 auto RCP = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {ResTy}, false)
3116 LLT ResTy = MRI.getType(Res);
3125 auto NegY = B.buildFNeg(ResTy, Y);
3126 auto One = B.buildFConstant(ResTy, 1.0);
3128 auto R = B.buildIntrinsic(Intrinsic::amdgcn_rcp, {ResTy}, false)
3132 auto Tmp0 = B.buildFMA(ResTy, NegY, R, One);
3133 R = B.buildFMA(ResTy, Tmp0, R, R);
3135 auto Tmp1 = B.buildFMA(ResTy, NegY, R, One)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 6340 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
6341 if (ResTy == MatchOperand_Success)
6346 if (ResTy == MatchOperand_ParseFail)
6404 OperandMatchResultTy ResTy = parseAnyRegister(Operands);
6405 if (ResTy == MatchOperand_Success) {
6585 OperandMatchResultTy ResTy =
6587 if (ResTy == MatchOperand_Success) {
6591 if (ResTy == MatchOperand_ParseFail)
6601 OperandMatchResultTy ResTy =
6603 if (ResTy == MatchOperand_Success)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86InstCombineIntrinsic.cpp | 442 Type *ResTy = II.getType();
446 return UndefValue::get(ResTy);
449 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128;
451 assert(cast<FixedVectorType>(ResTy)->getNumElements() == (2 * NumSrcElts) &&
455 unsigned DstScalarSizeInBits = ResTy->getScalarSizeInBits();
501 return Builder.CreateTrunc(Shuffle, ResTy);
507 Type *ResTy = II.getType();
511 return Constant::getNullValue(ResTy);
530 Res = Builder.CreateZExtOrTrunc(Res, ResTy);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.h | 263 Type *ResTy, VectorType *ValTy,
|
| ARMISelDAGToDAG.cpp | 2115 EVT ResTy;
2117 ResTy = VT;
2122 ResTy = EVT::getVectorVT(*CurDAG->getContext(), MVT::i64, ResTyElts);
2125 ResTys.push_back(ResTy);
2168 SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy), 0);
2171 ResTy, AddrTy, MVT::Other, OpsA);
2967 EVT ResTy = EVT::getVectorVT(*CurDAG->getContext(), MVT::i64, ResTyElts);
2970 ResTys.push_back(ResTy);
3013 SDValue(CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, dl, ResTy), 0);
|
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| CodeGenFunction.cpp | 1242 QualType ResTy = FD->getReturnType();
1247 ResTy = MD->getThisType();
1249 ResTy = CGM.getContext().VoidPtrTy;
1277 CGM.getCXXABI().addImplicitStructorParams(*this, ResTy, Args);
1279 return ResTy;
1288 QualType ResTy = BuildFunctionArgList(GD, Args);
1330 StartFunction(GD, ResTy, Fn, FnInfo, Args, Loc, BodyRange.getBegin());
|
| CGExprScalar.cpp | 1415 llvm::Type *ResTy = DstTy;
1444 if (DstTy != ResTy) {
1446 assert(ResTy->isIntegerTy(16) && "Only half FP requires extra conversion");
1451 Res = Builder.CreateFPTrunc(Res, ResTy, "conv");
4261 llvm::Type *ResTy = ConvertType(E->getType());
4288 return Builder.CreateZExtOrBitCast(RHSCond, ResTy, "land.ext");
4293 return llvm::Constant::getNullValue(ResTy);
4352 return Builder.CreateZExtOrBitCast(PN, ResTy, "land.ext");
4377 llvm::Type *ResTy = ConvertType(E->getType());
4404 return Builder.CreateZExtOrBitCast(RHSCond, ResTy, "lor.ext")
[all...] |
| CGCXXABI.h | 380 virtual void addImplicitStructorParams(CodeGenFunction &CGF, QualType &ResTy,
|
| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| CallAndMessageChecker.cpp | 642 QualType ResTy = msg.getResultType();
649 if (ResTy->isReferenceType()) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| MemorySanitizer.cpp | 2944 Type *ResTy = isX86_MMX ? IntegerType::get(*MS.C, 64) : I.getType();
2946 ResTy->getScalarSizeInBits() - SignificantBitsPerResultElement;
2950 S = IRB.CreateBitCast(S, ResTy);
2951 S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)),
2952 ResTy);
2963 Type *ResTy = isX86_MMX ? getMMXVectorTy(EltSizeInBits * 2) : I.getType();
2966 S = IRB.CreateBitCast(S, ResTy);
2967 S = IRB.CreateSExt(IRB.CreateICmpNE(S, Constant::getNullValue(ResTy)),
2968 ResTy);
2979 Type *ResTy = getShadowTy(&I)
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/Sema/ |
| SemaExpr.cpp | 3474 QualType ResTy;
3477 ResTy = Context.DependentTy;
3486 ResTy =
3489 ConvertUTF8ToWideString(Context.getTypeSizeInChars(ResTy).getQuantity(),
3491 ResTy = Context.getConstantArrayType(ResTy, LengthI, nullptr,
3495 /*Pascal*/ false, ResTy, Loc);
3497 ResTy = Context.adjustStringLiteralBaseType(Context.CharTy.withConst());
3498 ResTy = Context.getConstantArrayType(ResTy, LengthI, nullptr
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | 1204 /// ResTy vecreduce.add(ext(Ty A)), or if IsMLA flag is set then:
1205 /// ResTy vecreduce.add(mul(ext(Ty A), ext(Ty B)). The reduction happens
1206 /// on a VectorType with ResTy elements and Ty lanes.
1208 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1665 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty,
2173 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty,
2175 return Impl.getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty,
|
| /src/external/apache2/llvm/dist/clang/lib/AST/ |
| Expr.cpp | 4406 Opcode opc, QualType ResTy, ExprValueKind VK,
4409 : Expr(BinaryOperatorClass, ResTy, VK, OK) {
4423 Opcode opc, QualType ResTy, ExprValueKind VK,
4426 : Expr(CompoundAssignOperatorClass, ResTy, VK, OK) {
4448 Expr *rhs, Opcode opc, QualType ResTy,
4457 BinaryOperator(C, lhs, rhs, opc, ResTy, VK, OK, opLoc, FPFeatures);
4470 Opcode opc, QualType ResTy, ExprValueKind VK,
4479 CompoundAssignOperator(C, lhs, rhs, opc, ResTy, VK, OK, opLoc, FPFeatures,
|
