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    Searched refs:ResultReg2 (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 3652 unsigned ResultReg1 = 0, ResultReg2 = 0, MulReg = 0;
3736 ResultReg2 = fastEmitInst_rri(AArch64::CSINCWr, &AArch64::GPR32RegClass,
3739 (void)ResultReg2;
3740 assert((ResultReg1 + 1) == ResultReg2 &&
4989 const unsigned ResultReg2 = createResultReg(&AArch64::GPR32RegClass);
5007 .addDef(ResultReg2)
5012 assert((ResultReg1 + 1) == ResultReg2 && "Nonconsecutive result registers.");
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86FastISel.cpp 2961 Register ResultReg2 = createResultReg(&X86::GR8RegClass);
2962 assert((ResultReg+1) == ResultReg2 && "Nonconsecutive result registers.");
2964 ResultReg2).addImm(CondCode);

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