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    Searched refs:RetireControlUnit (Results 1 - 12 of 12) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/
RetireControlUnit.cpp 1 //===---------------------- RetireControlUnit.cpp ---------------*- C++ -*-===//
14 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
22 RetireControlUnit::RetireControlUnit(const MCSchedModel &SM)
27 "RetireControlUnit is not available for in-order processors");
43 unsigned RetireControlUnit::dispatch(const InstRef &IR) {
58 const RetireControlUnit::RUToken &RetireControlUnit::getCurrentToken() const {
59 const RetireControlUnit::RUToken &Current = Queue[CurrentInstructionSlotIdx];
67 unsigned RetireControlUnit::computeNextSlotIdx() const
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/
RetireControlUnit.h 1 //===---------------------- RetireControlUnit.h -----------------*- C++ -*-===//
31 /// this RetireControlUnit (RCU) gets notified.
36 struct RetireControlUnit : public HardwareUnit {
80 RetireControlUnit(const MCSchedModel &SM);
  /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/Stages/
DispatchStage.h 24 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
37 // RetireControlUnit) to write the opcodes associated with the instruction.
55 RetireControlUnit &RCU;
69 unsigned MaxDispatchWidth, RetireControlUnit &R,
RetireStage.h 12 /// simulated RetireControlUnit hardware.
22 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
30 RetireControlUnit &RCU;
38 RetireStage(RetireControlUnit &R, RegisterFile &F, LSUnitBase &LS)
  /src/external/apache2/llvm/dist/llvm/lib/MCA/Stages/
RetireStage.cpp 12 /// simulated RetireControlUnit hardware.
33 const RetireControlUnit::RUToken &Current = RCU.getCurrentToken();
54 assert(TokenID != RetireControlUnit::UnhandledTokenID);
DispatchStage.cpp 30 unsigned MaxDispatchWidth, RetireControlUnit &R,
InOrderIssueStage.cpp 20 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
234 unsigned RCUTokenID = RetireControlUnit::UnhandledTokenID;
  /src/external/apache2/llvm/lib/libLLVMMCA/
Makefile 24 RetireControlUnit.cpp \
  /src/external/apache2/llvm/dist/llvm/lib/MCA/
Context.cpp 19 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
39 auto RCU = std::make_unique<RetireControlUnit>(SM);
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenSchedule.h 250 Record *RetireControlUnit;
259 RetireControlUnit(nullptr), LoadQueue(nullptr), StoreQueue(nullptr) {}
270 return RetireControlUnit || LoadQueue || StoreQueue ||
CodeGenSchedule.cpp 462 RecVec Units = Records.getAllDerivedDefinitions("RetireControlUnit");
466 if (PM.RetireControlUnit) {
468 "Expected a single RetireControlUnit definition");
469 PrintNote(PM.RetireControlUnit->getLoc(),
470 "Previous definition of RetireControlUnit was here");
472 PM.RetireControlUnit = RCU;
510 // Collect processor RetireControlUnit descriptors if available.
SubtargetEmitter.cpp 646 if (Record *RCU = ProcModel.RetireControlUnit) {

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