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    Searched refs:Ri (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/arch/amd64/amd64/
db_disasm.c 88 #define Ri 7 /* register in instruction */
384 /*c8*/ { "bswap", false, LONG, op1(Ri), 0 },
385 /*c9*/ { "bswap", false, LONG, op1(Ri), 0 },
386 /*ca*/ { "bswap", false, LONG, op1(Ri), 0 },
387 /*cb*/ { "bswap", false, LONG, op1(Ri), 0 },
388 /*cc*/ { "bswap", false, LONG, op1(Ri), 0 },
389 /*cd*/ { "bswap", false, LONG, op1(Ri), 0 },
390 /*ce*/ { "bswap", false, LONG, op1(Ri), 0 },
391 /*cf*/ { "bswap", false, LONG, op1(Ri), 0 },
670 /*40*/ { "inc", false, LONG, op1(Ri), 0 }
    [all...]
  /src/sys/arch/i386/i386/
db_disasm.c 70 #define Ri 7 /* register in instruction */
638 /*40*/ { "inc", false, LONG, op1(Ri), 0 },
639 /*41*/ { "inc", false, LONG, op1(Ri), 0 },
640 /*42*/ { "inc", false, LONG, op1(Ri), 0 },
641 /*43*/ { "inc", false, LONG, op1(Ri), 0 },
642 /*44*/ { "inc", false, LONG, op1(Ri), 0 },
643 /*45*/ { "inc", false, LONG, op1(Ri), 0 },
644 /*46*/ { "inc", false, LONG, op1(Ri), 0 },
645 /*47*/ { "inc", false, LONG, op1(Ri), 0 },
647 /*48*/ { "dec", false, LONG, op1(Ri), 0 }
    [all...]
  /src/sys/arch/sh3/include/
locore.h 209 #define __INTR_MASK_EXCEPTION_UNBLOCK(Rs, Ri, Rb) \
210 mov #0x78, Ri /* 0xf0 >> 1 */ ;\
212 shll Ri /* Ri = PSL_IMASK */ ;\
216 or Ri, Rs /* SR |= PSL_IMASK */ ;\

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