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    Searched refs:S3C2410_MEMCTL_BASE (Results 1 - 4 of 4) sorted by relevancy

/src/sys/arch/evbarm/stand/board/
smdk2410_ram_init.S	56 .word S3C2410_MEMCTL_BASE + MEMCTL_BWSCON /* address */
/src/sys/arch/arm/s3c2xx0/
s3c2410reg.h	57 #define S3C2410_MEMCTL_BASE 0x48000000 /* memory controller */
s3c2410.c	134 if (bus_space_map(iot, S3C2410_MEMCTL_BASE,
/src/sys/arch/evbarm/smdk2xx0/
smdk2410_machdep.c	427 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON, 430 ioreg_read32(S3C2410_MEMCTL_BASE + MEMCTL_BWSCON)); 432 ioreg_write32(S3C2410_MEMCTL_BASE + MEMCTL_BANKCON(3),

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