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Searched refs:SBIC_CSR_CMD_INVALID (Results 1 - 12 of 12) sorted by relevancy

/src/sys/arch/acorn32/podulebus/
sbicreg.h	`239 #define SBIC_CSR_CMD_INVALID 0x40`
sbic.c	`700 && (csr != SBIC_CSR_CMD_INVALID));`
/src/sys/arch/amiga/dev/
sbicreg.h	`239 #define SBIC_CSR_CMD_INVALID 0x40`
siop.c	`533 && (csr != SBIC_CSR_CMD_INVALID));`
siop2.c	`520 && (csr != SBIC_CSR_CMD_INVALID));`
sbic.c	`785 && (csr != SBIC_CSR_CMD_INVALID));`
/src/sys/arch/mvme68k/dev/
sbicreg.h	`239 #define SBIC_CSR_CMD_INVALID 0x40`
sbic.c	`809 (csr != SBIC_CSR_CMD_INVALID));`
/src/sys/arch/sgimips/stand/common/
iris_scsireg.h	`312 #define SBIC_CSR_CMD_INVALID 0x40`
iris_scsi.c	`689 (csr != SBIC_CSR_CMD_INVALID));`
/src/sys/dev/ic/
wd33c93reg.h	`286 #define SBIC_CSR_CMD_INVALID 0x40`
wd33c93.c	`964 (csr != SBIC_CSR_CMD_INVALID));`

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