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Searched refs:SBIC_CSR_MIS (Results 1 - 10 of 10) sorted by relevancy

/src/sys/arch/sgimips/stand/common/
iris_scsi.c	`369 case SBIC_CSR_MIS \| CMD_PHASE: 379 case SBIC_CSR_MIS \| STATUS_PHASE: 395 case SBIC_CSR_MIS \| DATA_IN_PHASE: 399 case SBIC_CSR_MIS \| DATA_OUT_PHASE: 418 case SBIC_CSR_MIS \| MESG_IN_PHASE: 433 case SBIC_CSR_MIS \| MESG_OUT_PHASE:`
iris_scsireg.h	`310 #define SBIC_CSR_MIS 0x28 /* (I) xfer aborted, ph mis */`
/src/sys/arch/mvme68k/dev/
sbic.c	`1380 case SBIC_CSR_MIS \| CMD_PHASE: 1390 case SBIC_CSR_MIS \| STATUS_PHASE: 2109 case SBIC_CSR_MIS \| CMD_PHASE: 2117 case SBIC_CSR_MIS \| STATUS_PHASE: 2153 case SBIC_CSR_MIS \| DATA_OUT_PHASE: 2154 case SBIC_CSR_MIS \| DATA_IN_PHASE: 2254 case SBIC_CSR_MIS \| MESG_IN_PHASE: 2275 case SBIC_CSR_MIS \| MESG_OUT_PHASE: 2385 if (csr == (SBIC_CSR_MIS \| MESG_IN_PHASE) \|\|`
sbicreg.h	`237 #define SBIC_CSR_MIS 0x28 /* (I) xfer aborted, ph mis */`
/src/sys/arch/acorn32/podulebus/
sbic.c	`1343 case SBIC_CSR_MIS \| CMD_PHASE: 1365 case SBIC_CSR_MIS \| DATA_OUT_PHASE: 1366 case SBIC_CSR_MIS \| DATA_IN_PHASE: 1391 case SBIC_CSR_MIS \| STATUS_PHASE: 2041 case SBIC_CSR_MIS \| CMD_PHASE: 2052 case SBIC_CSR_MIS \| STATUS_PHASE: 2075 case SBIC_CSR_MIS \| DATA_OUT_PHASE: 2076 case SBIC_CSR_MIS \| DATA_IN_PHASE: 2142 case SBIC_CSR_MIS \| MESG_IN_PHASE: 2155 case SBIC_CSR_MIS \| MESG_OUT_PHASE [all...]`
sbicreg.h	`237 #define SBIC_CSR_MIS 0x28 /* (I) xfer aborted, ph mis */`
/src/sys/arch/amiga/dev/
sbic.c	`1408 case SBIC_CSR_MIS\|CMD_PHASE: 1429 case SBIC_CSR_MIS\|DATA_OUT_PHASE: 1430 case SBIC_CSR_MIS\|DATA_IN_PHASE: 1461 case SBIC_CSR_MIS\|STATUS_PHASE: 2215 case SBIC_CSR_MIS\|CMD_PHASE: 2226 case SBIC_CSR_MIS\|STATUS_PHASE: 2277 case SBIC_CSR_MIS\|DATA_OUT_PHASE: 2278 case SBIC_CSR_MIS\|DATA_IN_PHASE: 2349 case SBIC_CSR_MIS\|MESG_IN_PHASE: 2361 case SBIC_CSR_MIS\|MESG_OUT_PHASE [all...]`
sbicreg.h	`237 #define SBIC_CSR_MIS 0x28 /* (I) xfer aborted, ph mis */`
/src/sys/dev/ic/
wd33c93.c	`1899 case SBIC_CSR_MIS \| CMD_PHASE: 1908 case SBIC_CSR_MIS \| STATUS_PHASE: 1936 case SBIC_CSR_MIS \| DATA_IN_PHASE: 1940 case SBIC_CSR_MIS \| DATA_OUT_PHASE: 2001 case SBIC_CSR_MIS \| MESG_IN_PHASE: 2022 case SBIC_CSR_MIS \| MESG_OUT_PHASE: 2109 if (csr == (SBIC_CSR_MIS \| MESG_IN_PHASE) \|\|`
wd33c93reg.h	`284 #define SBIC_CSR_MIS 0x28 /* (I) xfer aborted, ph mis */`

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