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    Searched refs:SBIC_CSR_MIS_1 (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/arch/sgimips/stand/common/
iris_scsi.c 370 case SBIC_CSR_MIS_1 | CMD_PHASE:
380 case SBIC_CSR_MIS_1 | STATUS_PHASE:
396 case SBIC_CSR_MIS_1 | DATA_IN_PHASE:
400 case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
419 case SBIC_CSR_MIS_1 | MESG_IN_PHASE:
434 case SBIC_CSR_MIS_1 | MESG_OUT_PHASE:
iris_scsireg.h 320 #define SBIC_CSR_MIS_1 0x48 /* ph mis, see low bits */
  /src/sys/arch/mvme68k/dev/
sbic.c 1381 case SBIC_CSR_MIS_1 | CMD_PHASE:
1391 case SBIC_CSR_MIS_1 | STATUS_PHASE:
2110 case SBIC_CSR_MIS_1 | CMD_PHASE:
2118 case SBIC_CSR_MIS_1 | STATUS_PHASE:
2155 case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
2156 case SBIC_CSR_MIS_1 | DATA_IN_PHASE:
2255 case SBIC_CSR_MIS_1 | MESG_IN_PHASE:
2276 case SBIC_CSR_MIS_1 | MESG_OUT_PHASE:
2386 csr == (SBIC_CSR_MIS_1 | MESG_IN_PHASE) ||
sbicreg.h 247 #define SBIC_CSR_MIS_1 0x48 /* ph mis, see low bits */
  /src/sys/arch/acorn32/podulebus/
sbic.c 1344 case SBIC_CSR_MIS_1 | CMD_PHASE:
1367 case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
1368 case SBIC_CSR_MIS_1 | DATA_IN_PHASE:
1392 case SBIC_CSR_MIS_1 | STATUS_PHASE:
2042 case SBIC_CSR_MIS_1 | CMD_PHASE:
2053 case SBIC_CSR_MIS_1 | STATUS_PHASE:
2077 case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
2078 case SBIC_CSR_MIS_1 | DATA_IN_PHASE:
2143 case SBIC_CSR_MIS_1 | MESG_IN_PHASE:
2156 case SBIC_CSR_MIS_1 | MESG_OUT_PHASE
    [all...]
sbicreg.h 247 #define SBIC_CSR_MIS_1 0x48 /* ph mis, see low bits */
  /src/sys/arch/amiga/dev/
sbic.c 1409 case SBIC_CSR_MIS_1|CMD_PHASE:
1431 case SBIC_CSR_MIS_1|DATA_OUT_PHASE:
1432 case SBIC_CSR_MIS_1|DATA_IN_PHASE:
1462 case SBIC_CSR_MIS_1|STATUS_PHASE:
2216 case SBIC_CSR_MIS_1|CMD_PHASE:
2227 case SBIC_CSR_MIS_1|STATUS_PHASE:
2279 case SBIC_CSR_MIS_1|DATA_OUT_PHASE:
2280 case SBIC_CSR_MIS_1|DATA_IN_PHASE:
2350 case SBIC_CSR_MIS_1|MESG_IN_PHASE:
2362 case SBIC_CSR_MIS_1|MESG_OUT_PHASE
    [all...]
sbicreg.h 247 #define SBIC_CSR_MIS_1 0x48 /* ph mis, see low bits */
  /src/sys/dev/ic/
wd33c93.c 1900 case SBIC_CSR_MIS_1 | CMD_PHASE:
1909 case SBIC_CSR_MIS_1 | STATUS_PHASE:
1937 case SBIC_CSR_MIS_1 | DATA_IN_PHASE:
1941 case SBIC_CSR_MIS_1 | DATA_OUT_PHASE:
2002 case SBIC_CSR_MIS_1 | MESG_IN_PHASE:
2023 case SBIC_CSR_MIS_1 | MESG_OUT_PHASE:
2110 csr == (SBIC_CSR_MIS_1 | MESG_IN_PHASE) ||
wd33c93reg.h 294 #define SBIC_CSR_MIS_1 0x48 /* ph mis, see low bits */

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