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    Searched refs:SCDesc (Results 1 - 14 of 14) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCSchedule.cpp 41 const MCSchedClassDesc &SCDesc) {
43 for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries;
47 STI.getWriteLatencyEntry(&SCDesc, DefIdx);
58 const MCSchedClassDesc &SCDesc = *getSchedClassDesc(SchedClass);
59 if (!SCDesc.isValid())
61 if (!SCDesc.isVariant())
62 return MCSchedModel::computeInstrLatency(STI, SCDesc);
71 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass);
72 if (!SCDesc->isValid())
76 while (SCDesc->isVariant())
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  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
TargetSchedule.cpp 136 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass);
137 if (!SCDesc->isValid())
138 return SCDesc;
143 while (SCDesc->isVariant()) {
147 SCDesc = SchedModel.getSchedClassDesc(SchedClass);
149 return SCDesc;
217 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);
219 if (DefIdx < SCDesc->NumWriteLatencyEntries) {
222 STI->getWriteLatencyEntry(SCDesc, DefIdx);
241 if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit(
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MachinePipeliner.cpp 1014 const MCSchedClassDesc *SCDesc =
1016 if (!SCDesc->isValid())
1022 make_range(STI->getWriteProcResBegin(SCDesc),
1023 STI->getWriteProcResEnd(SCDesc))) {
1057 const MCSchedClassDesc *SCDesc =
1059 if (!SCDesc->isValid())
1065 make_range(STI->getWriteProcResBegin(SCDesc),
1066 STI->getWriteProcResEnd(SCDesc))) {
3017 const MCSchedClassDesc *SCDesc = SM.getSchedClassDesc(InsnClass);
3018 if (!SCDesc->isValid())
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  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
SchedClassResolution.cpp 50 getNonRedundantWriteProcRes(const MCSchedClassDesc &SCDesc,
59 for (const auto *WPR = STI.getWriteProcResBegin(&SCDesc),
60 *const WPREnd = STI.getWriteProcResEnd(&SCDesc);
210 SCDesc(STI.getSchedModel().getSchedClassDesc(ResolvedSchedClassId)),
212 NonRedundantWriteProcRes(getNonRedundantWriteProcRes(*SCDesc, STI)),
215 assert((SCDesc == nullptr || !SCDesc->isVariant()) &&
274 for (unsigned I = 0; I < SCDesc->NumWriteLatencyEntries; ++I) {
276 STI.getWriteLatencyEntry(SCDesc, I);
299 Measure.PerInstructionValue = SCDesc->NumMicroOps
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SchedClassResolution.h 52 const MCSchedClassDesc *const SCDesc;
Analysis.cpp 141 const MCSchedClassDesc *const SCDesc =
143 writeEscaped<kEscapeCsv>(OS, SCDesc->Name);
382 if (RSC.SCDesc->isValid()) {
386 OS << "<td>" << RSC.SCDesc->NumMicroOps << "</td>";
389 for (int I = 0, E = RSC.SCDesc->NumWriteLatencyEntries; I < E; ++I) {
391 SubtargetInfo_->getWriteLatencyEntry(RSC.SCDesc, I);
393 if (RSC.SCDesc->NumWriteLatencyEntries > 1) {
404 MCSchedModel::getReciprocalThroughput(*SubtargetInfo_, *RSC.SCDesc));
551 if (!RSCAndPoints.RSC.SCDesc)
585 writeEscaped<kEscapeHtml>(OS, RSCAndPoints.RSC.SCDesc->Name)
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  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64StorePairSuppress.cpp 86 const MCSchedClassDesc *SCDesc =
90 if (SCDesc->isValid() && !SCDesc->isVariant()) {
91 unsigned ResLenWithSTP = BBTrace.getResourceLength(None, SCDesc);
AArch64SIMDInstrOpt.cpp 229 const MCSchedClassDesc *SCDesc =
235 if (!SCDesc->isValid() || SCDesc->isVariant())
  /src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/
InstructionInfoView.cpp 110 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
111 IIVDEntry.NumMicroOpcodes = SCDesc.NumMicroOps;
112 IIVDEntry.Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
115 STI.getReadAdvanceEntries(SCDesc));
116 IIVDEntry.RThroughput = MCSchedModel::getReciprocalThroughput(STI, SCDesc);
  /src/external/apache2/llvm/dist/llvm/lib/MCA/
InstrBuilder.cpp 39 const MCSchedClassDesc &SCDesc,
65 for (unsigned I = 0, E = SCDesc.NumWriteProcResEntries; I < E; ++I) {
66 const MCWriteProcResEntry *PRE = STI.getWriteProcResBegin(&SCDesc) + I;
73 WithColor::note() << "found in scheduling class " << SCDesc.Name
207 const MCSchedClassDesc &SCDesc,
216 int Latency = MCSchedModel::computeInstrLatency(STI, SCDesc);
254 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
301 unsigned NumWriteLatencyEntries = SCDesc.NumWriteLatencyEntries;
328 *STI.getWriteLatencyEntry(&SCDesc, CurrentDef);
356 *STI.getWriteLatencyEntry(&SCDesc, Index)
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  /src/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/
Disassembler.cpp 210 const MCSchedClassDesc *SCDesc = SCModel.getSchedClassDesc(SCClass);
213 if (!SCDesc || !SCDesc->isValid() || SCDesc->isVariant())
218 for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries;
221 const MCWriteLatencyEntry *WLEntry = STI->getWriteLatencyEntry(SCDesc,
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
SubtargetEmitter.cpp 991 MCSchedClassDesc &SCDesc = SCTab.back();
992 // SCDesc.Name is guarded by NDEBUG
993 SCDesc.NumMicroOps = 0;
994 SCDesc.BeginGroup = false;
995 SCDesc.EndGroup = false;
996 SCDesc.RetireOOO = false;
997 SCDesc.WriteProcResIdx = 0;
998 SCDesc.WriteLatencyIdx = 0;
999 SCDesc.ReadAdvanceIdx = 0;
1011 SCDesc.NumMicroOps = MCSchedClassDesc::VariantNumMicroOps
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  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCSchedule.h 356 const MCSchedClassDesc &SCDesc);
365 const MCSchedClassDesc &SCDesc);
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
TargetSchedule.h 47 unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;

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