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  /src/sys/dev/microcode/aic7xxx/
aic7xxx.seq 190 mvi SCSISIGO, P_MESGOUT|BSYO;
511 mvi SCSISIGO, P_MESGOUT|BSYO;
533 clr SCSISIGO;
614 mvi SCSISIGO, P_MESGIN|BSYO;
1504 or SCSISIGO, ATNO, LASTPHASE;
1506 mvi SCSISIGO, ATNO;
1955 or SCSISIGO, ATNO, LASTPHASE;
1957 mvi SCSISIGO, ATNO;
2010 mov SCSISIGO, SINDEX;
2122 and SCSISIGO, PHASE_MASK, SCSISIGI
    [all...]
aic79xx.seq 89 test SCSISIGO, ATNO jz idle_loop_check_nonpackreq;
640 test SCSISIGO, ATNO jnz select_out_non_packetized;
781 mvi SCSISIGO, ATNO;
1247 mvi SCSISIGO, ATNO;
1754 test SCSISIGO, ATNO jnz . + 2;
1773 test SCSISIGO, ATNO jnz . + 2;
1922 test SCSISIGO, ATNO jnz . + 2;
aic7xxx.reg 137 register SCSISIGO {
aic7xxx_reg.h 47 ahc_print_register(NULL, 0, "SCSISIGO", 0x03, regvalue, cur_col, wrap)
1103 #define SCSISIGO 0x03
aic79xx.reg 1652 register SCSISIGO {
aic79xx_reg.h 460 ahd_print_register(NULL, 0, "SCSISIGO", 0x40, regvalue, cur_col, wrap)
2654 #define SCSISIGO 0x40
  /src/sys/dev/ic/
aic79xx_osm.c 756 ahd_outb(ahd, SCSISIGO, ACKO);
758 ahd_outb(ahd, SCSISIGO, 0);
aic7xxx_osm.c 939 ahc_outb(ahc, SCSISIGO, last_phase|ATNO);
aic7xxx.c 281 ahc_outb(ahc, SCSISIGO, 0); /* De-assert BSY */
764 * if the expected phase in SCSISIGO matches
770 ahc_outb(ahc, SCSISIGO, curphase);
2256 u_int scsisigo; local
2258 scsisigo = ATNO;
2260 scsisigo |= ahc_inb(ahc, SCSISIGI);
2261 ahc_outb(ahc, SCSISIGO, scsisigo);
2837 ahc_outb(ahc, SCSISIGO, P_MESGOUT | BSYO);
2904 ahc_outb(ahc, SCSISIGO, P_MESGIN | BSYO)
    [all...]
aic79xx.c 275 ahd_outb(ahd, SCSISIGO, ATNO);
338 ahd_outb(ahd, SCSISIGO, 0); /* De-assert BSY */
946 && (ahd_inb(ahd, SCSISIGO) & ATNO) != 0) {
1952 if ((ahd_inb(ahd, SCSISIGO) & ATNO) != 0
3754 if ((ahd_inb(ahd, SCSISIGO) & ATNO) != 0) {
3990 ahd_outb(ahd, SCSISIGO, P_MESGOUT | BSYO);
4062 ahd_outb(ahd, SCSISIGO, P_MESGIN | BSYO);

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