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    Searched refs:SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT (Results 1 - 9 of 9) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_0_sh_mask.h 402 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
sdma0_4_1_sh_mask.h 401 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
sdma0_4_2_2_sh_mask.h 408 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
sdma0_4_2_sh_mask.h 402 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h 868 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
oss_2_4_sh_mask.h 938 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
oss_3_0_1_sh_mask.h 952 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
oss_3_0_sh_mask.h 1458 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h 94 #define SDMA0_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2
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