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    Searched refs:SDMA0_GFX_RB_WPTR (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_cik_sdma.c 101 reg = SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET;
103 reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET;
122 reg = SDMA0_GFX_RB_WPTR + SDMA0_REGISTER_OFFSET;
124 reg = SDMA0_GFX_RB_WPTR + SDMA1_REGISTER_OFFSET;
402 WREG32(SDMA0_GFX_RB_WPTR + reg_offset, 0);
417 WREG32(SDMA0_GFX_RB_WPTR + reg_offset, ring->wptr << 2);
cikd.h 1992 #define SDMA0_GFX_RB_WPTR 0xD210

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