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Searched refs:SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma0/
sdma0_4_0_sh_mask.h	`1145 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
sdma0_4_1_sh_mask.h	`1137 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
sdma0_4_2_2_sh_mask.h	`1159 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
sdma0_4_2_sh_mask.h	`1149 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h	`1096 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
oss_2_4_sh_mask.h	`1200 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
oss_3_0_1_sh_mask.h	`1612 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
oss_3_0_sh_mask.h	`1934 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h	`929 #define SDMA0_GFX_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4 [all...]`

Completed in 140 milliseconds