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Searched refs:SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_sh_mask.h	`396 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
sdma1_4_2_2_sh_mask.h	`398 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
sdma1_4_2_sh_mask.h	`394 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h	`1386 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
oss_2_4_sh_mask.h	`1536 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
oss_3_0_1_sh_mask.h	`2050 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
oss_3_0_sh_mask.h	`2354 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h	`2860 #define SDMA1_CNTL__SEM_WAIT_INT_ENABLE__SHIFT 0x2 [all...]`

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