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    Searched refs:SDMA1_STATUS1_REG__CE_WR_IDLE_MASK (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_sh_mask.h 555 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x00000002L
sdma1_4_2_2_sh_mask.h 557 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x00000002L
sdma1_4_2_sh_mask.h 553 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x00000002L
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h 1485 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2
oss_2_4_sh_mask.h 1649 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2
oss_3_0_1_sh_mask.h 2167 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2
oss_3_0_sh_mask.h 2471 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h 3035 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x00000002L
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