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    Searched refs:SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_sh_mask.h 528 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x00040000L
sdma1_4_2_2_sh_mask.h 530 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x00040000L
sdma1_4_2_sh_mask.h 526 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x00040000L
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h 1463 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x40000
oss_2_4_sh_mask.h 1625 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x40000
oss_3_0_1_sh_mask.h 2143 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x40000
oss_3_0_sh_mask.h 2447 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x40000
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h 3008 #define SDMA1_STATUS_REG__IB_MC_RREQ_IDLE_MASK 0x00040000L
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