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    Searched refs:SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/sdma1/
sdma1_4_0_sh_mask.h 494 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
sdma1_4_2_2_sh_mask.h 496 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
sdma1_4_2_sh_mask.h 492 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/oss/
oss_2_0_sh_mask.h 1456 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
oss_2_4_sh_mask.h 1616 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
oss_3_0_1_sh_mask.h 2134 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
oss_3_0_sh_mask.h 2438 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_sh_mask.h 2974 #define SDMA1_STATUS_REG__MC_WR_IDLE__SHIFT 0xd
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