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    Searched refs:SETOEQ (Results 1 - 21 of 21) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1344 SETOEQ, // 0 0 0 1 True if ordered and equal
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelDAGToDAG.cpp 62 case ISD::SETOEQ:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
Analysis.cpp 193 case FCmpInst::FCMP_OEQ: return ISD::SETOEQ;
214 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 438 case ISD::SETOEQ: return "setoeq";
TargetLowering.cpp 321 case ISD::SETOEQ:
4190 case ISD::SETOEQ: NewCond = IsNegInf ? ISD::SETOLE : ISD::SETOGE; break;
8833 assert(TLI.isCondCodeLegal(ISD::SETOEQ, OpVT) &&
8834 "If SETUE is expanded, SETOEQ or SETUNE must be legal!");
8838 assert(TLI.isCondCodeLegal(ISD::SETOEQ, OpVT) &&
8839 "If SETO is expanded, SETOEQ must be legal!");
8840 CC1 = ISD::SETOEQ;
8841 CC2 = ISD::SETOEQ;
8861 case ISD::SETOEQ:
LegalizeFloatTypes.cpp 1822 RHSHi, ISD::SETOEQ, Chain, IsSignaling);
SelectionDAG.cpp 540 case ISD::SETOEQ: // SETEQ & SETU[LG]E
2222 case ISD::SETOEQ:
2287 case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIWholeQuadMode.cpp 827 case ISD::SETOEQ:
AMDGPUISelLowering.cpp 1391 case ISD::SETOEQ:
SIISelLowering.cpp 10730 if ((CC == ISD::SETOEQ || CC == ISD::SETONE) && LHS.getOpcode() == ISD::FABS) {
10745 unsigned Mask = CC == ISD::SETOEQ ? IsInfMask : IsFiniteMask;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 856 case ISD::SETOEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 4115 case ISD::SETOEQ:
4152 case ISD::SETOEQ:
4153 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ
4196 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break;
4204 case ISD::SETOEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1585 case ISD::SETOEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 543 case ISD::SETOEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 1827 Op->getOperand(2), ISD::SETOEQ);
MipsISelLowering.cpp 606 case ISD::SETOEQ: return Mips::FCOND_OEQ;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 1386 case ISD::SETOEQ: return SPCC::FCC_E;
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1958 case ISD::SETOEQ: CondCode = ARMCC::EQ; break;
5402 if (CC == ISD::SETOEQ)
5533 (CC == ISD::SETEQ || CC == ISD::SETOEQ ||
6491 case ISD::SETOEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 201 // SETOEQ and SETUNE require checking two conditions.
203 setCondCodeAction(ISD::SETOEQ, VT, Expand);
5101 case ISD::SETOEQ:
22710 case ISD::SETOEQ:
22739 case ISD::SETOEQ:
24381 if (CC == ISD::SETOEQ) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 2259 case ISD::SETOEQ:
7141 if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 2718 case ISD::SETOEQ:

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