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    Searched refs:SETOGE (Results 1 - 22 of 22) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1346 SETOGE, // 0 0 1 1 True if ordered and greater than or equal
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelDAGToDAG.cpp 77 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
Analysis.cpp 195 case FCmpInst::FCMP_OGE: return ISD::SETOGE;
219 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 440 case ISD::SETOGE: return "setoge";
TargetLowering.cpp 333 case ISD::SETOGE:
4190 case ISD::SETOEQ: NewCond = IsNegInf ? ISD::SETOLE : ISD::SETOGE; break;
8863 case ISD::SETOGE:
SelectionDAG.cpp 2224 case ISD::SETOGE:
2314 case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
DAGCombiner.cpp 9202 case ISD::SETOGE:
13827 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 4047 case ISD::SETOGE:
4074 case ISD::SETOGE:
4112 case ISD::SETOGE:
4163 case ISD::SETOGE:
4187 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break;
4198 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break;
4218 case ISD::SETOGE:
PPCISelLowering.cpp 619 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
620 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
1161 setCondCodeAction(ISD::SETOGE, MVT::f128, Expand);
7858 case ISD::SETOGE:
7896 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 263 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
268 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
400 setCondCodeAction(ISD::SETOGE, Ty, Expand);
MipsISelLowering.cpp 615 case ISD::SETOGE: return Mips::FCOND_OGE;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIWholeQuadMode.cpp 835 case ISD::SETOGE:
AMDGPUISelLowering.cpp 1437 case ISD::SETOGE:
1740 SDValue cv = DAG.getSetCC(DL, SetCCVT, fr, fb, ISD::SETOGE);
2262 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 852 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1571 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 547 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 1396 case ISD::SETOGE: return SPCC::FCC_GE;
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 299 ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
548 ISD::SETGT, ISD::SETOGT, ISD::SETGE, ISD::SETOGE,
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 2728 case ISD::SETOGE:
2860 SDValue GE = getVectorCmp(DAG, getVectorComparison(ISD::SETOGE, Mode),
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1962 case ISD::SETOGE: CondCode = ARMCC::GE; break;
4931 if (CC == ISD::SETUGE || CC == ISD::SETOGE || CC == ISD::SETOLE ||
6499 case ISD::SETOGE:
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 5089 case ISD::SETOGE:
22716 case ISD::SETOGE:
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 2267 case ISD::SETOGE:

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