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    Searched refs:SETUEQ (Results 1 - 24 of 24) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
ISDOpcodes.h 1352 SETUEQ, // 1 0 0 1 True if unordered or equal
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEISelDAGToDAG.cpp 83 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
Analysis.cpp 201 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ;
214 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGDumper.cpp 447 case ISD::SETUEQ: return "setueq";
SelectionDAG.cpp 541 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
2230 case ISD::SETUEQ:
2320 case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||
TargetLowering.cpp 368 case ISD::SETUEQ:
4191 case ISD::SETUEQ: NewCond = IsNegInf ? ISD::SETULE : ISD::SETUGE; break;
8845 case ISD::SETUEQ:
8847 // SETOGT || SETOLT, inverting the result for SETUEQ. We only need one
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
ARCISelLowering.cpp 42 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
SIWholeQuadMode.cpp 803 case ISD::SETUEQ:
R600ISelLowering.cpp 105 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
AMDGPUISelLowering.cpp 1395 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 857 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 4109 case ISD::SETUEQ:
4162 case ISD::SETUEQ:
4240 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break;
4248 case ISD::SETUEQ:
PPCISelLowering.cpp 617 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
618 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
934 setCondCodeAction(ISD::SETUEQ, MVT::v4f32, Expand);
987 setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand);
1160 setCondCodeAction(ISD::SETUEQ, MVT::f128, Expand);
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1563 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
NVPTXISelDAGToDAG.cpp 559 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 104 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 345 setCondCodeAction(ISD::SETUEQ, VT, Expand);
1453 setCondCodeAction(ISD::SETUEQ, VT, Expand);
2286 case ISD::SETUEQ:
2330 case ISD::SETUEQ:
2361 case ISD::SETUEQ:
7141 if ((CC == ISD::SETEQ || CC == ISD::SETOEQ || CC == ISD::SETUEQ) &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
MipsSEISelLowering.cpp 1847 Op->getOperand(2), ISD::SETUEQ);
MipsISelLowering.cpp 624 case ISD::SETUEQ: return Mips::FCOND_UEQ;
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcISelLowering.cpp 1404 case ISD::SETUEQ: return SPCC::FCC_UE;
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 299 ISD::SETOGT, ISD::SETOGE, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
546 ISD::SETO, ISD::SETONE, ISD::SETUEQ, ISD::SETUGT,
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 1968 case ISD::SETUEQ: CondCode = ARMCC::EQ; CondCode2 = ARMCC::VS; break;
6505 case ISD::SETUEQ: Invert = true; LLVM_FALLTHROUGH;
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 2870 case ISD::SETUEQ:
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 5083 case ISD::SETUEQ:
22728 case ISD::SETUEQ: SSECC = 8; break;
22740 case ISD::SETUEQ:
22954 // In the two cases not handled by SSE compare predicates (SETUEQ/SETONE),
22957 // LLVM predicate is SETUEQ or SETONE.
22960 if (Cond == ISD::SETUEQ) {
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