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    Searched refs:SMBUS_TIMING_CNTL2__SMBCLK_LEVEL_CTRL_MARGIN_MASK (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/thm/
thm_10_0_sh_mask.h	759 #define SMBUS_TIMING_CNTL2__SMBCLK_LEVEL_CTRL_MARGIN_MASK 0x07FFE000L
thm_9_0_sh_mask.h	1192 #define SMBUS_TIMING_CNTL2__SMBCLK_LEVEL_CTRL_MARGIN_MASK 0x07FFE000L

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