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    Searched refs:SMU74_MAX_LEVELS_LINK (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
polaris10_smumgr.h 64 uint32_t bif_sclk_table[SMU74_MAX_LEVELS_LINK];
amdgpu_polaris10_smumgr.c 2254 max_entry = (SMU74_MAX_LEVELS_LINK < pcie_table->count) ?
2255 SMU74_MAX_LEVELS_LINK :
2370 return SMU74_MAX_LEVELS_LINK;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
smu74.h 139 #define SMU74_MAX_LEVELS_LINK SMU__NUM_PCIE_DPM_LEVELS /* PCIe speed and number of lanes */
smu74_discrete.h 286 SMU74_Discrete_LinkLevel LinkLevel[SMU74_MAX_LEVELS_LINK];

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