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    Searched refs:SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smuio/
smuio_9_0_sh_mask.h 264 #define SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK 0x01FF0000L
smuio_11_0_0_sh_mask.h 32 #define SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK 0x01FF0000L
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_smu_v11_0.c 1266 SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK) >>
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_hwmgr.c 2234 SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR_MASK) >>

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