HomeSort by: relevance | last modified time | path
    Searched refs:SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smuio/
smuio_9_0_sh_mask.h 263 #define SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT 0x10
smuio_11_0_0_sh_mask.h 30 #define SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT 0x10
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_smu_v11_0.c 1267 SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega20_hwmgr.c 2235 SMUSVI0_TEL_PLANE0__SVI0_PLANE0_VDDCOR__SHIFT;

Completed in 19 milliseconds