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    Searched refs:SMU_SCLK_DPM_STATE_0_AT (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
trinityd.h	70 #define SMU_SCLK_DPM_STATE_0_AT 0x1f010
radeon_trinity_dpm.c	713 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix); 716 WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);

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