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    Searched refs:SOCCLK (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/
amdgpu_display_mode_vba.c 248 mode_lib->vba.SOCCLK = soc->clock_limits[i].socclk_mhz;
835 mode_lib->vba.SOCCLK = mode_lib->vba.cache_pipes[0].clks_cfg.socclk_mhz;
display_mode_vba.h 272 double SOCCLK;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
amdgpu_renoir_ppt.c 120 CLK_MAP(SOCCLK, CLOCK_SOCCLK),
amdgpu_arcturus_ppt.c 140 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
431 /* socclk */
437 pr_err("[%s] failed to get socclk dpm levels!\n", __func__);
442 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100;
690 pr_err("Attempt to get current socclk Failed!");
697 pr_err("Attempt to get socclk levels Failed!");
789 pr_err("Failed to set soft %s socclk !\n",
844 * support mclk/socclk/fclk softmin/softmax settings
1091 * But this is available for gfxclk/uclk/socclk.
amdgpu_navi10_ppt.c 140 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
405 /* disable DPM UCLK and DS SOCCLK on navi10 A0 secure board */
503 /* SOCCLK Spread Spectrum */
1309 "SOCCLK",
1374 case 1: /* Socclk */
amdgpu_vega20_ppt.c 162 CLK_MAP(SOCCLK, PPCLK_SOCCLK),
731 /* socclk */
738 pr_err("[SetupDefaultDpmTable] failed to get socclk dpm levels!");
743 single_dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.socclk / 100;
1016 pr_err("Attempt to get current socclk Failed!");
1023 pr_err("Attempt to get socclk levels Failed!");
1242 pr_err("Failed to set soft %s socclk !\n",
1840 "SOCCLK",
1918 case 1: /* Socclk */
2201 /* socclk */
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/
amdgpu_display_mode_vba_21.c 310 double SOCCLK,
2436 mode_lib->vba.SOCCLK,
5212 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel];
5248 double SOCCLK,
5337 + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
5344 + WritebackChunkSize * 1024.0 / 32.0 / SOCCLK;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/
amdgpu_display_mode_vba_20.c 1507 / mode_lib->vba.SOCCLK;
1519 DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK);
1530 / mode_lib->vba.SOCCLK;
5102 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel];
amdgpu_display_mode_vba_20v2.c 1543 / mode_lib->vba.SOCCLK;
1555 DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK);
1566 / mode_lib->vba.SOCCLK;
5145 mode_lib->vba.SOCCLK = mode_lib->vba.SOCCLKPerState[mode_lib->vba.VoltageLevel];
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
amdgpu_dcn20_resource.c 2789 context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000;

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