| /src/external/gpl3/gdb/dist/sim/testsuite/bfin/ |
| stk5.s | 6 SP += -12;
7 FP = SP;
15 [ -- SP ] = ( R7:7, P5:4 );
20 ( R7:7, P5:4 ) = [ SP ++ ];
27 [ -- SP ] = R5;
29 [ -- SP ] = R5;
32 SP = SP + P5;
|
| link-2.s | 9 R0 = SP;
11 R1 = SP;
16 /* Make sure UNLINK restores old SP */
18 R1 = SP;
|
| c_pushpopmultiple_preg.s | 8 FP = SP;
18 [ -- SP ] = ( P5:1 );
24 ( P5:1 ) = [ SP ++ ];
35 [ -- SP ] = ( P5:2 );
40 ( P5:2 ) = [ SP ++ ];
50 [ -- SP ] = ( P5:3 );
54 ( P5:3 ) = [ SP ++ ];
63 [ -- SP ] = ( P5:4 );
66 ( P5:4 ) = [ SP ++ ];
74 [ -- SP ] = ( P5:5 )
[all...] |
| stk2.s | 25 SP = P0;
36 [ -- SP ] = ( R7:0, P5:0 );
37 // DBG SP;
47 ( R7:0, P5:0 ) = [ SP ++ ];
57 R0 = SP;
71 [ -- SP ] = R7;
72 [ -- SP ] = R0;
74 [ -- SP ] = R7;
76 SP += 4;
77 R0 = [ SP ++ ]
[all...] |
| zcall.s | 6 FP = SP;
28 [ -- SP ] = R7;
30 SP += 4;
38 [ -- SP ] = R7;
42 SP += 4;
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/bfin/ |
| stk5.s | 6 SP += -12;
7 FP = SP;
15 [ -- SP ] = ( R7:7, P5:4 );
20 ( R7:7, P5:4 ) = [ SP ++ ];
27 [ -- SP ] = R5;
29 [ -- SP ] = R5;
32 SP = SP + P5;
|
| link-2.s | 9 R0 = SP;
11 R1 = SP;
16 /* Make sure UNLINK restores old SP */
18 R1 = SP;
|
| c_pushpopmultiple_preg.s | 8 FP = SP;
18 [ -- SP ] = ( P5:1 );
24 ( P5:1 ) = [ SP ++ ];
35 [ -- SP ] = ( P5:2 );
40 ( P5:2 ) = [ SP ++ ];
50 [ -- SP ] = ( P5:3 );
54 ( P5:3 ) = [ SP ++ ];
63 [ -- SP ] = ( P5:4 );
66 ( P5:4 ) = [ SP ++ ];
74 [ -- SP ] = ( P5:5 )
[all...] |
| stk2.s | 25 SP = P0;
36 [ -- SP ] = ( R7:0, P5:0 );
37 // DBG SP;
47 ( R7:0, P5:0 ) = [ SP ++ ];
57 R0 = SP;
71 [ -- SP ] = R7;
72 [ -- SP ] = R0;
74 [ -- SP ] = R7;
76 SP += 4;
77 R0 = [ SP ++ ]
[all...] |
| zcall.s | 6 FP = SP;
28 [ -- SP ] = R7;
30 SP += 4;
38 [ -- SP ] = R7;
42 SP += 4;
|
| /src/sys/external/bsd/compiler_rt/dist/lib/xray/ |
| xray_trampoline_AArch64.S | 21 STP X1, X2, [SP, #-16]!
22 STP X3, X4, [SP, #-16]!
23 STP X5, X6, [SP, #-16]!
24 STP X7, X30, [SP, #-16]!
25 STP Q0, Q1, [SP, #-32]!
26 STP Q2, Q3, [SP, #-32]!
27 STP Q4, Q5, [SP, #-32]!
28 STP Q6, Q7, [SP, #-32]!
43 LDP Q6, Q7, [SP], #32
44 LDP Q4, Q5, [SP], #3
[all...] |
| /src/external/gpl3/gcc/dist/libgcc/config/bfin/ |
| crtn.S | 37 P5 = [SP++];
39 P3 = [SP++];
46 P5 = [SP++];
48 P3 = [SP++];
|
| crti.S | 39 [--SP] = P5;
41 [--SP] = P3;
52 [--SP] = P5;
54 [--SP] = P3;
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/bfin/ |
| crtn.S | 37 P5 = [SP++];
39 P3 = [SP++];
46 P5 = [SP++];
48 P3 = [SP++];
|
| crti.S | 39 [--SP] = P5;
41 [--SP] = P3;
52 [--SP] = P5;
54 [--SP] = P3;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 61 SP::G0, SP::G1, SP::G2, SP::G3,
62 SP::G4, SP::G5, SP::G6, SP::G7,
63 SP::O0, SP::O1, SP::O2, SP::O3
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.cpp | 36 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {}
58 Reserved.set(SP::G1);
62 Reserved.set(SP::G2);
63 Reserved.set(SP::G3);
64 Reserved.set(SP::G4);
68 Reserved.set(SP::G5);
70 Reserved.set(SP::O6);
71 Reserved.set(SP::I6);
72 Reserved.set(SP::I7);
73 Reserved.set(SP::G0)
[all...] |
| SparcFrameLowering.cpp | 52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
53 .addReg(SP::O6).addImm(NumBytes);
63 // add %sp, %g1, %sp
64 BuildMI(MBB, MBBI, dl, TII.get(SP::SETHIi), SP::G1)
66 BuildMI(MBB, MBBI, dl, TII.get(SP::ORri), SP::G1)
67 .addReg(SP::G1).addImm(LO10(NumBytes));
68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6
[all...] |
| DelaySlotFiller.cpp | 117 (MI->getOpcode() == SP::RESTORErr
118 || MI->getOpcode() == SP::RESTOREri)) {
126 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD
127 || MI->getOpcode() == SP::FCMPQ)) {
128 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
146 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
156 TII->get(SP::UNIMP)).addImm(structSize);
178 if (slot->getOpcode() == SP::RET || slot->getOpcode() == SP::TLS_CALL
[all...] |
| SparcInstrInfo.cpp | 35 : SparcGenInstrInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP), RI(),
45 if (MI.getOpcode() == SP::LDri || MI.getOpcode() == SP::LDXri ||
46 MI.getOpcode() == SP::LDFri || MI.getOpcode() == SP::LDDFri ||
47 MI.getOpcode() == SP::LDQFri) {
64 if (MI.getOpcode() == SP::STri || MI.getOpcode() == SP::STXri ||
65 MI.getOpcode() == SP::STFri || MI.getOpcode() == SP::STDFri |
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcInstPrinter.cpp | 26 // namespace. But SPARC backend uses "SP" as its namespace.
29 using namespace SP;
60 case SP::JMPLrr:
61 case SP::JMPLri: {
68 case SP::G0: // jmp $addr | ret | retl
73 case SP::I7: O << "\tret"; return true;
74 case SP::O7: O << "\tretl"; return true;
79 case SP::O7: // call $addr
84 case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ
[all...] |
| /src/external/gpl3/gdb/dist/sim/testsuite/d10v/ |
| t-ae-st-is.s | 13 ldi sp,#0x4000
14 st r8, @-SP
16 ldi sp,#0x4001
18 st r8,@-SP
|
| t-ae-st2w-is.s | 13 ldi sp, #0x4004
14 st2w r8, @-SP
16 ldi sp, #0x4005
18 st2w r8,@-SP
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/d10v/ |
| t-ae-st-is.s | 13 ldi sp,#0x4000
14 st r8, @-SP
16 ldi sp,#0x4001
18 st r8,@-SP
|
| t-ae-st2w-is.s | 13 ldi sp, #0x4004
14 st2w r8, @-SP
16 ldi sp, #0x4005
18 st2w r8,@-SP
|
