| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFRegisterInfo.h | 31 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
|
| BPFRegisterInfo.cpp | 57 int SPAdj, unsigned FIOperandNum,
59 assert(SPAdj == 0 && "Unexpected");
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.h | 36 int SPAdj, unsigned FIOperandNum,
|
| MSP430RegisterInfo.cpp | 104 int SPAdj, unsigned FIOperandNum,
106 assert(SPAdj == 0 && "Unexpected");
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| ARCRegisterInfo.h | 39 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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| ARCRegisterInfo.cpp | 41 int ObjSize, RegScavenger *RS, int SPAdj) {
66 BaseReg = RS->scavengeRegister(&ARC::GPR32RegClass, II, SPAdj);
161 int SPAdj, unsigned FIOperandNum,
163 assert(SPAdj == 0 && "Unexpected");
218 ObjSize, RS, SPAdj);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| LanaiRegisterInfo.h | 37 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
|
| LanaiRegisterInfo.cpp | 132 int SPAdj, unsigned FIOperandNum,
134 assert(SPAdj == 0 && "Unexpected");
170 Reg = RS->scavengeRegister(&Lanai::GPRRegClass, II, SPAdj);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| VERegisterInfo.h | 38 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.h | 38 int SPAdj, unsigned FIOperandNum,
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| RegisterScavenging.h | 146 /// available and do the appropriate bookkeeping. SPAdj is the stack
155 MachineBasicBlock::iterator I, int SPAdj,
157 Register scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj,
159 return scavengeRegister(RegClass, MBBI, SPAdj, AllowSpill);
165 /// SPAdj is the stack adjustment due to call frame, it's passed along to
173 bool RestoreAfter, int SPAdj,
219 ScavengedInfo &spill(Register Reg, const TargetRegisterClass &RC, int SPAdj,
|
| TargetFrameLowering.h | 104 int alignSPAdjust(int SPAdj) const {
105 if (SPAdj < 0) {
106 SPAdj = -alignTo(-SPAdj, StackAlignment);
108 SPAdj = alignTo(SPAdj, StackAlignment);
110 return SPAdj;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| R600RegisterInfo.h | 50 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| AVRRegisterInfo.h | 40 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.h | 41 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
|
| NVPTXRegisterInfo.cpp | 113 int SPAdj, unsigned FIOperandNum,
115 assert(SPAdj == 0 && "Unexpected");
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.h | 38 int SPAdj, unsigned FIOperandNum,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegisterInfo.h | 37 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
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| WebAssemblyRegisterInfo.cpp | 54 MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum,
56 assert(SPAdj == 0);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.h | 55 int SPAdj, unsigned FIOperandNum,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.h | 41 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| M68kRegisterInfo.h | 90 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsRegisterInfo.h | 63 int SPAdj, unsigned FIOperandNum,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVRegisterInfo.h | 43 void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 125 int SPAdj, unsigned FIOperandNum,
|
