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Searched refs:SPLL_CNTL_MODE (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/radeon/
rv6xxd.h	`29 #define SPLL_CNTL_MODE 0x60c`
rv770d.h	`113 #define SPLL_CNTL_MODE 0x610`
radeon_si.c	`4025 tmp = RREG32(SPLL_CNTL_MODE); 4027 WREG32(SPLL_CNTL_MODE, tmp); 4037 tmp = RREG32(SPLL_CNTL_MODE); 4039 WREG32(SPLL_CNTL_MODE, tmp); 7462 orig = data = RREG32(SPLL_CNTL_MODE); 7465 WREG32(SPLL_CNTL_MODE, data);`
sid.h	`110 #define SPLL_CNTL_MODE 0x618`
radeon_rv6xx_dpm.c	`412 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC);`
radeon_rv770_dpm.c	`879 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC);`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si.c	`2048 orig = data = RREG32(SPLL_CNTL_MODE); 2051 WREG32(SPLL_CNTL_MODE, data);`
sid.h	`112 #define SPLL_CNTL_MODE 0x186`

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