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    Searched refs:SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_6_0_sh_mask.h 302 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0x00000c00L
smu_7_0_0_sh_mask.h 219 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0xc00
smu_7_1_1_sh_mask.h 209 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0xc00
smu_7_0_1_sh_mask.h 211 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0xc00
smu_7_1_0_sh_mask.h 209 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0xc00
smu_7_1_2_sh_mask.h 211 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0xc00
smu_7_1_3_sh_mask.h 237 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV_MASK 0xc00

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