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Searched refs:SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_6_0_sh_mask.h	`303 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0x0000000a`
smu_7_0_0_sh_mask.h	`220 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa`
smu_7_1_1_sh_mask.h	`210 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa`
smu_7_0_1_sh_mask.h	`212 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa`
smu_7_1_0_sh_mask.h	`210 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa`
smu_7_1_2_sh_mask.h	`212 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa`
smu_7_1_3_sh_mask.h	`238 #define SPLL_CNTL_MODE__SPLL_TEST_CLK_EXT_DIV__SHIFT 0xa`

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