| /src/external/gpl3/binutils/dist/opcodes/ |
| m32r-opc.c | 307 /* beq $src1,$src2,$disp16 */
310 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
385 /* bne $src1,$src2,$disp16 */
388 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
415 /* cmp $src1,$src2 */
418 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
427 /* cmpu $src1,$src2 */
430 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
439 /* cmpeq $src1,$src2 */
442 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } }
[all...] |
| m32r-opinst.c | 121 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
181 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
309 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
317 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
324 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }
[all...] |
| tic54x-dis.c | 290 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| m32r-opc.c | 307 /* beq $src1,$src2,$disp16 */
310 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
385 /* bne $src1,$src2,$disp16 */
388 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
415 /* cmp $src1,$src2 */
418 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
427 /* cmpu $src1,$src2 */
430 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
439 /* cmpeq $src1,$src2 */
442 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } }
[all...] |
| m32r-opinst.c | 121 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
181 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
309 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
317 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
324 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }
[all...] |
| tic54x-dis.c | 290 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
| /src/external/gpl3/gdb/dist/opcodes/ |
| m32r-opc.c | 307 /* beq $src1,$src2,$disp16 */
310 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
385 /* bne $src1,$src2,$disp16 */
388 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
415 /* cmp $src1,$src2 */
418 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
427 /* cmpu $src1,$src2 */
430 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
439 /* cmpeq $src1,$src2 */
442 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } }
[all...] |
| m32r-opinst.c | 121 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
181 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
309 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
317 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
324 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }
[all...] |
| tic54x-dis.c | 290 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| m32r-opc.c | 307 /* beq $src1,$src2,$disp16 */
310 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
385 /* bne $src1,$src2,$disp16 */
388 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), ',', OP (DISP16), 0 } },
415 /* cmp $src1,$src2 */
418 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
427 /* cmpu $src1,$src2 */
430 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } },
439 /* cmpeq $src1,$src2 */
442 { { MNEM, ' ', OP (SRC1), ',', OP (SRC2), 0 } }
[all...] |
| m32r-opinst.c | 121 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
181 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
309 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
317 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
324 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }
[all...] |
| tic54x-dis.c | 290 src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A;
|
| /src/external/gpl3/binutils/dist/include/opcode/ |
| tic54x.h | 102 #define SRC1(OP) ((OP)&0x100)
|
| /src/external/gpl3/binutils.old/dist/include/opcode/ |
| tic54x.h | 102 #define SRC1(OP) ((OP)&0x100)
|
| /src/external/gpl3/gdb/dist/include/opcode/ |
| tic54x.h | 102 #define SRC1(OP) ((OP)&0x100)
|
| /src/external/gpl3/gdb.old/dist/include/opcode/ |
| tic54x.h | 102 #define SRC1(OP) ((OP)&0x100)
|
| /src/crypto/external/apache2/openssl/dist/crypto/modes/asm/ |
| aes-gcm-avx512.pl | 629 my @SRC1;
630 $SRC1[0] = $_[6]; # [in] source 1 ZMM register
631 $SRC1[1] = $_[7]; # [in] source 1 ZMM register
632 $SRC1[2] = $_[8]; # [in] source 1 ZMM register
633 $SRC1[3] = $_[9]; # [in] source 1 ZMM register
647 $code .= "$OPCODE $SRC2[$reg_idx],$SRC1[$reg_idx],$DST[$reg_idx]\n";
653 my $SRC1REG = $SRC1[$reg_idx];
|
