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    Searched refs:SUNXI_CCU_PHASE (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/arch/arm/sunxi/
sunxi_ccu_phase.c 1 /* $NetBSD: sunxi_ccu_phase.c,v 1.1 2017/07/17 23:26:17 jmcneill Exp $ */
30 __KERNEL_RCSID(0, "$NetBSD: sunxi_ccu_phase.c,v 1.1 2017/07/17 23:26:17 jmcneill Exp $");
61 struct sunxi_ccu_phase *phase = &clk->u.phase;
66 KASSERT(clk->type == SUNXI_CCU_PHASE);
87 struct sunxi_ccu_phase *phase = &clk->u.phase;
92 KASSERT(clk->type == SUNXI_CCU_PHASE);
121 struct sunxi_ccu_phase *phase = &clk->u.phase;
123 KASSERT(clk->type == SUNXI_CCU_PHASE);
sun8i_v3s_ccu.c 286 SUNXI_CCU_PHASE(V3S_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",
288 SUNXI_CCU_PHASE(V3S_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",
293 SUNXI_CCU_PHASE(V3S_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",
295 SUNXI_CCU_PHASE(V3S_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",
300 SUNXI_CCU_PHASE(V3S_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",
302 SUNXI_CCU_PHASE(V3S_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",
sun8i_h3_ccu.c 359 SUNXI_CCU_PHASE(H3_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",
361 SUNXI_CCU_PHASE(H3_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",
366 SUNXI_CCU_PHASE(H3_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",
368 SUNXI_CCU_PHASE(H3_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",
373 SUNXI_CCU_PHASE(H3_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",
375 SUNXI_CCU_PHASE(H3_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",
sun9i_a80_ccu.c 281 SUNXI_CCU_PHASE(A80_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",
283 SUNXI_CCU_PHASE(A80_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",
292 SUNXI_CCU_PHASE(A80_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",
294 SUNXI_CCU_PHASE(A80_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",
303 SUNXI_CCU_PHASE(A80_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",
305 SUNXI_CCU_PHASE(A80_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",
sun4i_a10_ccu.c 319 SUNXI_CCU_PHASE(A10_CLK_MMC0_SAMPLE, "mmc0_sample", "mmc0",
321 SUNXI_CCU_PHASE(A10_CLK_MMC0_OUTPUT, "mmc0_output", "mmc0",
330 SUNXI_CCU_PHASE(A10_CLK_MMC1_SAMPLE, "mmc1_sample", "mmc1",
332 SUNXI_CCU_PHASE(A10_CLK_MMC1_OUTPUT, "mmc1_output", "mmc1",
341 SUNXI_CCU_PHASE(A10_CLK_MMC2_SAMPLE, "mmc2_sample", "mmc2",
343 SUNXI_CCU_PHASE(A10_CLK_MMC2_OUTPUT, "mmc2_output", "mmc2",
352 SUNXI_CCU_PHASE(A10_CLK_MMC3_SAMPLE, "mmc3_sample", "mmc3",
354 SUNXI_CCU_PHASE(A10_CLK_MMC3_OUTPUT, "mmc3_output", "mmc3",
sunxi_ccu.h 64 SUNXI_CCU_PHASE,
313 struct sunxi_ccu_phase { struct
326 #define SUNXI_CCU_PHASE(_id, _name, _parent, _reg, _mask) \
328 .type = SUNXI_CCU_PHASE, \
455 struct sunxi_ccu_phase phase;
sunxi_ccu.c 359 case SUNXI_CCU_PHASE: type = "phase"; break;

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