HomeSort by: relevance | last modified time | path
    Searched refs:SchedClasses (Results 1 - 2 of 2) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenSchedule.h 96 /// Represent a transition between SchedClasses induced by SchedVariant.
123 /// require the class. ProcIndices are propagated through SchedClasses as
124 /// variants are expanded. Multiple SchedClasses may be inferred from an
433 // List of unique SchedClasses.
434 std::vector<CodeGenSchedClass> SchedClasses;
456 class_iterator classes_begin() { return SchedClasses.begin(); }
457 const_class_iterator classes_begin() const { return SchedClasses.begin(); }
458 class_iterator classes_end() { return SchedClasses.end(); }
459 const_class_iterator classes_end() const { return SchedClasses.end(); }
542 assert(Idx < SchedClasses.size() && "bad SchedClass index")
    [all...]
CodeGenSchedule.cpp 212 // Infer new SchedClasses from SchedVariant.
586 // More may be inferred later when inferring new SchedClasses from variants.
861 /// SchedClasses. More SchedClasses may be inferred.
865 assert(SchedClasses.empty() && "Expected empty sched class");
866 SchedClasses.emplace_back(0, "NoInstrModel",
868 SchedClasses.back().ProcIndices.push_back(0);
889 NumInstrSchedClasses = SchedClasses.size();
931 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs;
1015 if (Idx || SchedClasses[0].isKeyEqual(ItinClassDef, OperWrites, OperReads))
    [all...]

Completed in 27 milliseconds